aboutsummaryrefslogtreecommitdiff
path: root/arch/mips/pmc-sierra/yosemite/irq.c
blob: b91d0aa3b7ed3667374d0873cc56782d07e570dd (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
/*
 * Copyright (C) 2003 PMC-Sierra Inc.
 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
 *
 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 *
 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  You should have received a copy of the  GNU General Public License along
 *  with this program; if not, write  to the Free Software Foundation, Inc.,
 *  675 Mass Ave, Cambridge, MA 02139, USA.
 *
 * Second level Interrupt handlers for the PMC-Sierra Titan/Yosemite board
 */
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/irq.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/titan_dep.h>

/* Hypertransport specific */
#define IRQ_ACK_BITS            0x00000000	/* Ack bits */

#define HYPERTRANSPORT_INTA     0x78		/* INTA# */
#define HYPERTRANSPORT_INTB     0x79		/* INTB# */
#define HYPERTRANSPORT_INTC     0x7a		/* INTC# */
#define HYPERTRANSPORT_INTD     0x7b		/* INTD# */

extern void jaguar_mailbox_irq(struct pt_regs *);

/*
 * Handle hypertransport & SMP interrupts. The interrupt lines are scarce.
 * For interprocessor interrupts, the best thing to do is to use the INTMSG
 * register. We use the same external interrupt line, i.e. INTB3 and monitor
 * another status bit
 */
asmlinkage void ll_ht_smp_irq_handler(int irq, struct pt_regs *regs)
{
	u32 status = OCD_READ(RM9000x2_OCD_INTP0STATUS4);

	/* Ack all the bits that correspond to the interrupt sources */
	if (status != 0)
		OCD_WRITE(RM9000x2_OCD_INTP0STATUS4, IRQ_ACK_BITS);

	status = OCD_READ(RM9000x2_OCD_INTP1STATUS4);
	if (status != 0)
		OCD_WRITE(RM9000x2_OCD_INTP1STATUS4, IRQ_ACK_BITS);

#ifdef CONFIG_HT_LEVEL_TRIGGER
	/*
	 * Level Trigger Mode only. Send the HT EOI message back to the source.
	 */
	switch (status) {
	case 0x1000000:
		OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTA);
		break;
	case 0x2000000:
		OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTB);
		break;
	case 0x4000000:
		OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTC);
		break;
	case 0x8000000:
		OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTD);
		break;
	case 0x0000001:
		/* PLX */
		OCD_WRITE(RM9000x2_OCD_HTEOI, 0x20);
		OCD_WRITE(IRQ_CLEAR_REG, IRQ_ACK_BITS);
		break;
	case 0xf000000:
		OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTA);
		OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTB);
		OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTC);
		OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTD);
		break;
	}
#endif /* CONFIG_HT_LEVEL_TRIGGER */

	do_IRQ(irq, regs);
}

asmlinkage void do_extended_irq(struct pt_regs *regs)
{
	unsigned int intcontrol = read_c0_intcontrol();
	unsigned int cause = read_c0_cause();
	unsigned int status = read_c0_status();
	unsigned int pending_sr, pending_ic;

	pending_sr = status & cause & 0xff00;
	pending_ic = (cause >> 8) & intcontrol & 0xff00;

	if (pending_ic & (1 << 13))
		do_IRQ(13, regs);

}

asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
{
	unsigned int cause = read_c0_cause();
	unsigned int status = read_c0_status();
	unsigned int pending = cause & status;

	if (pending & STATUSF_IP7) {
		do_IRQ(7, regs);
	} else if (pending & STATUSF_IP2) {
#ifdef CONFIG_HYPERTRANSPORT
		ll_ht_smp_irq_handler(2, regs);
#else
		do_IRQ(2, regs);
#endif
	} else if (pending & STATUSF_IP3) {
		do_IRQ(3, regs);
	} else if (pending & STATUSF_IP4) {
		do_IRQ(4, regs);
	} else if (pending & STATUSF_IP5) {
#ifdef CONFIG_SMP
		titan_mailbox_irq(regs);
#else
		do_IRQ(5, regs);
#endif
	} else if (pending & STATUSF_IP6) {
		do_IRQ(4, regs);
	}
}

#ifdef CONFIG_KGDB
extern void init_second_port(void);
#endif

/*
 * Initialize the next level interrupt handler
 */
void __init arch_init_irq(void)
{
	clear_c0_status(ST0_IM);

	mips_cpu_irq_init(0);
	rm7k_cpu_irq_init(8);
	rm9k_cpu_irq_init(12);

#ifdef CONFIG_KGDB
	/* At this point, initialize the second serial port */
	init_second_port();
#endif

#ifdef CONFIG_GDB_CONSOLE
	register_gdb_console();
#endif
}

#ifdef CONFIG_KGDB
/*
 * The 16550 DUART has two ports, but is allocated one IRQ
 * for the serial console. Hence, a generic framework for
 * serial IRQ routing in place. Currently, just calls the
 * do_IRQ fuction. But, going in the future, need to check
 * DUART registers for channel A and B, then decide the
 * appropriate action
 */
asmlinkage void yosemite_kgdb_irq(int irq, struct pt_regs *regs)
{
	do_IRQ(irq, regs);
}
#endif