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#ifndef _PCA9632_H
#define _PCA9632_H
enum pca9632_regs{
PCA9632_REG_MODE1 = 0x00,
PCA9632_REG_MODE2 = 0x01,
PCA9632_REG_PWM0 = 0x02,
PCA9632_REG_PWM1 = 0x03,
PCA9632_REG_PWM2 = 0x04,
PCA9632_REG_PWM3 = 0x05,
PCA9632_REG_GRPPWM = 0x06,
PCA9632_REG_GRPFREQ = 0x07,
PCA9632_REG_LEDOUT = 0x08,
PCA9632_REG_SUBADDR1 = 0x09,
PCA9632_REG_SUBADDR2 = 0x0a,
PCA9632_REG_SUBADDR3 = 0x0b,
PCA9632_REG_ALLCALLADR1 = 0x0c,
};
#define PCA9632_DMBLNK_SHIFT 5
#endif /* _PCA9632_H */
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