1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
|
#ifndef __GLAMO_MFD_H
#define __GLAMO_MFD_H
struct glamo_core;
struct glamo_spigpio_platform_data;
struct glamo_fb_platform_data;
struct glamo_mmc_platform_data {
int (*glamo_mmc_use_slow)(void);
struct glamo_core *core;
};
struct glamo_gpio_platform_data {
int base;
void (*registered)(struct device *dev);
};
struct glamo_platform_data {
struct glamo_fb_platform_data *fb_data;
struct glamo_mmc_platform_data *mmc_data;
struct glamo_gpio_platform_data *gpio_data;
unsigned int osci_clock_rate;
void (*glamo_external_reset)(int);
};
enum glamo_engine {
GLAMO_ENGINE_CAPTURE = 0,
GLAMO_ENGINE_ISP = 1,
GLAMO_ENGINE_JPEG = 2,
GLAMO_ENGINE_MPEG_ENC = 3,
GLAMO_ENGINE_MPEG_DEC = 4,
GLAMO_ENGINE_LCD = 5,
GLAMO_ENGINE_CMDQ = 6,
GLAMO_ENGINE_2D = 7,
GLAMO_ENGINE_3D = 8,
GLAMO_ENGINE_MMC = 9,
GLAMO_ENGINE_MICROP0 = 10,
GLAMO_ENGINE_RISC = 11,
GLAMO_ENGINE_MICROP1_MPEG_ENC = 12,
GLAMO_ENGINE_MICROP1_MPEG_DEC = 13,
__NUM_GLAMO_ENGINES
};
#define GLAMO_ENGINE_ALL (__NUM_GLAMO_ENGINES)
#endif
|
