diff options
| author | Pekka Paalanen <pq@iki.fi> | 2007-09-29 23:06:29 +0300 |
|---|---|---|
| committer | Pekka Paalanen <pq@iki.fi> | 2007-09-30 22:16:01 +0300 |
| commit | dc592c8b7bc12d16c658648f124792ac4d2882b9 (patch) | |
| tree | 632172757a9f9154fe15e7898062ea4cfeab82e1 /shared-core/nv30_graph.c | |
| parent | 88bdb38cea60cea918b6e6a1ca97a7ec3de5b832 (diff) | |
nouveau: Make nv20 use the nv30 PGRAPH ctx functions.
Diffstat (limited to 'shared-core/nv30_graph.c')
| -rw-r--r-- | shared-core/nv30_graph.c | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/shared-core/nv30_graph.c b/shared-core/nv30_graph.c index 2210abdb..108412ed 100644 --- a/shared-core/nv30_graph.c +++ b/shared-core/nv30_graph.c @@ -23,11 +23,23 @@ * */ +/*#define NV20_GRCTX_SIZE (3529*4)*/ + +#define NV28_GRCTX_SIZE (3529*4) #define NV30_31_GRCTX_SIZE (22392) #define NV34_GRCTX_SIZE (18140) #define NV35_36_GRCTX_SIZE (22396) + +static void nv28_graph_context_init(struct drm_device *dev, + struct nouveau_gpuobj *ctx) +{ + int i; + (void)dev; + +} + static void nv30_31_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx) { struct drm_nouveau_private *dev_priv = dev->dev_private; @@ -2715,6 +2727,10 @@ int nv30_graph_create_context(struct nouveau_channel *chan) int ret; switch (dev_priv->chipset) { + case 0x28: + ctx_size = NV28_GRCTX_SIZE; + ctx_init = nv28_graph_context_init; + break; case 0x30: case 0x31: ctx_size = NV30_31_GRCTX_SIZE; @@ -2732,7 +2748,9 @@ int nv30_graph_create_context(struct nouveau_channel *chan) default: ctx_size = 0; ctx_init = nv35_36_graph_context_init; - DRM_ERROR("Please contact the devs if you want your NV%x card to work\n",dev_priv->chipset); + DRM_ERROR("Please contact the devs if you want your NV%x" + " card to work\n", dev_priv->chipset); + return -ENOSYS; break; } @@ -2744,7 +2762,10 @@ int nv30_graph_create_context(struct nouveau_channel *chan) /* Initialise default context values */ ctx_init(dev, chan->ramin_grctx->gpuobj); - INSTANCE_WR(chan->ramin_grctx->gpuobj, 0x28/4, (chan->id<<24)|0x1); /* CTX_USER */ + /* nv20: INSTANCE_WR(chan->ramin_grctx->gpuobj, 10, chan->id<<24); */ + INSTANCE_WR(chan->ramin_grctx->gpuobj, 0x28/4, (chan->id<<24)|0x1); + /* CTX_USER */ + INSTANCE_WR(dev_priv->ctx_table->gpuobj, chan->id, chan->ramin_grctx->instance >> 4); |