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authorMatthieu Castet <castet.matthieu@free.fr>2007-08-26 20:48:32 +0200
committerMatthieu Castet <castet.matthieu@free.fr>2007-08-26 20:48:32 +0200
commita331d2e352675be260254e8abef412540ead9c30 (patch)
treefe304a8c516a1e6643e06cf34eed6136c83823e9 /shared-core
parent4182fce4084f4d884a7435b8ad2acb5c209f4544 (diff)
nouveau : add NV04_PGRAPH_TRAPPED_ADDR definition
- fix offset for nv04 - use it in nv10 graph ctx switch for getting next channel - dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+
Diffstat (limited to 'shared-core')
-rw-r--r--shared-core/nouveau_irq.c24
-rw-r--r--shared-core/nouveau_reg.h8
-rw-r--r--shared-core/nv10_graph.c2
3 files changed, 22 insertions, 12 deletions
diff --git a/shared-core/nouveau_irq.c b/shared-core/nouveau_irq.c
index d8a2c1b8..e64677ed 100644
--- a/shared-core/nouveau_irq.c
+++ b/shared-core/nouveau_irq.c
@@ -227,8 +227,10 @@ nouveau_graph_trapped_channel(struct drm_device *dev, int *channel_ret)
struct drm_nouveau_private *dev_priv = dev->dev_private;
int channel;
- if (dev_priv->card_type < NV_40) {
- channel = (NV_READ(0x400704) >> 20) & 0x1f;
+ if (dev_priv->card_type < NV_10) {
+ channel = (NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 24) & 0xf;
+ } else if (dev_priv->card_type < NV_40) {
+ channel = (NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 20) & 0x1f;
} else
if (dev_priv->card_type < NV_50) {
uint32_t cur_grctx = (NV_READ(0x40032C) & 0xfffff) << 4;
@@ -283,16 +285,22 @@ nouveau_graph_dump_trap_info(struct drm_device *dev)
struct drm_nouveau_private *dev_priv = dev->dev_private;
uint32_t address;
uint32_t channel, class;
- uint32_t method, subc, data;
+ uint32_t method, subc, data, data2;
uint32_t nsource, nstatus;
if (nouveau_graph_trapped_channel(dev, &channel))
channel = -1;
- address = NV_READ(0x400704);
- subc = (address >> 16) & 0x7;
+ data = NV_READ(NV04_PGRAPH_TRAPPED_DATA);
+ address = NV_READ(NV04_PGRAPH_TRAPPED_ADDR);
method = address & 0x1FFC;
- data = NV_READ(0x400708);
+ if (dev_priv->card_type < NV_10) {
+ subc = (address >> 13) & 0x7;
+ data2= 0;
+ } else {
+ subc = (address >> 16) & 0x7;
+ data2= NV_READ(NV10_PGRAPH_TRAPPED_DATA_HIGH);
+ }
nsource = NV_READ(NV03_PGRAPH_NSOURCE);
nstatus = NV_READ(NV03_PGRAPH_NSTATUS);
if (dev_priv->card_type < NV_50) {
@@ -309,8 +317,8 @@ nouveau_graph_dump_trap_info(struct drm_device *dev)
ARRAY_SIZE(nouveau_nstatus_names));
printk("\n");
- DRM_ERROR("Channel %d/%d (class 0x%04x) - Method 0x%04x, Data 0x%08x\n",
- channel, subc, class, method, data);
+ DRM_ERROR("Channel %d/%d (class 0x%04x) - Method 0x%04x, Data 0x%08x:0x%08x\n",
+ channel, subc, class, method, data2, data);
}
static void nouveau_pgraph_irq_handler(struct drm_device *dev)
diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h
index 1023e75e..a1895c34 100644
--- a/shared-core/nouveau_reg.h
+++ b/shared-core/nouveau_reg.h
@@ -15,9 +15,6 @@
# define NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK 0xfff00000
# define NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT 20
-#define NV03_PGRAPH_STATUS 0x004006b0
-#define NV04_PGRAPH_STATUS 0x00400700
-
#define NV_RAMIN 0x00700000
#define NV_RAMHT_HANDLE_OFFSET 0
@@ -264,7 +261,12 @@
#define NV04_PGRAPH_BLIMIT5 0x00400698
#define NV04_PGRAPH_BSWIZZLE2 0x0040069C
#define NV04_PGRAPH_BSWIZZLE5 0x004006A0
+#define NV03_PGRAPH_STATUS 0x004006B0
+#define NV04_PGRAPH_STATUS 0x00400700
+#define NV04_PGRAPH_TRAPPED_ADDR 0x00400704
+#define NV04_PGRAPH_TRAPPED_DATA 0x00400708
#define NV04_PGRAPH_SURFACE 0x0040070C
+#define NV10_PGRAPH_TRAPPED_DATA_HIGH 0x0040070C
#define NV04_PGRAPH_STATE 0x00400710
#define NV10_PGRAPH_SURFACE 0x00400710
#define NV04_PGRAPH_NOTIFY 0x00400714
diff --git a/shared-core/nv10_graph.c b/shared-core/nv10_graph.c
index c604ff2e..e470ff06 100644
--- a/shared-core/nv10_graph.c
+++ b/shared-core/nv10_graph.c
@@ -594,7 +594,7 @@ void nouveau_nv10_context_switch(struct drm_device *dev)
return;
}
- chid = NV_READ(NV03_PFIFO_CACHE1_PUSH1)&(nouveau_fifo_number(dev)-1);
+ chid = (NV_READ(NV04_PGRAPH_TRAPPED_ADDR) >> 20)&(nouveau_fifo_number(dev)-1);
next = dev_priv->fifos[chid];
if (!next) {