diff options
| author | Nian Wu <nian.wu@intel.com> | 2007-03-14 17:00:27 +0800 |
|---|---|---|
| committer | Nian Wu <nian.wu@intel.com> | 2007-03-14 17:00:27 +0800 |
| commit | df73975980e926e350bf36bf4bc8a07220f66164 (patch) | |
| tree | 1223a71af50798f02691a0d2e90f4925085c4581 /shared-core | |
| parent | 80d0018bc078d489f509152673c838be3c471854 (diff) | |
| parent | 93f66af76a18357f7e3bfcb52c241962287c5caa (diff) | |
Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline
Diffstat (limited to 'shared-core')
| -rw-r--r-- | shared-core/r300_cmdbuf.c | 4 | ||||
| -rw-r--r-- | shared-core/r300_reg.h | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/shared-core/r300_cmdbuf.c b/shared-core/r300_cmdbuf.c index 815b9f86..667a829b 100644 --- a/shared-core/r300_cmdbuf.c +++ b/shared-core/r300_cmdbuf.c @@ -692,9 +692,9 @@ static __inline__ void r300_pacify(drm_radeon_private_t *dev_priv) BEGIN_RING(6); OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); - OUT_RING(R300_RB3D_DSTCACHE_0A); + OUT_RING(R300_RB3D_DSTCACHE_UNKNOWN_0A); OUT_RING(CP_PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0)); - OUT_RING(R300_RB3D_ZCACHE_CTLSTAT_03); + OUT_RING(R300_RB3D_ZCACHE_UNKNOWN_03); OUT_RING(CP_PACKET3(RADEON_CP_NOP, 0)); OUT_RING(0x0); ADVANCE_RING(); diff --git a/shared-core/r300_reg.h b/shared-core/r300_reg.h index 5115b086..a85a7d48 100644 --- a/shared-core/r300_reg.h +++ b/shared-core/r300_reg.h @@ -1322,8 +1322,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * Set to 0A before 3D operations, set to 02 afterwards. */ #define R300_RB3D_DSTCACHE_CTLSTAT 0x4E4C -# define R300_RB3D_DSTCACHE_02 0x00000002 -# define R300_RB3D_DSTCACHE_0A 0x0000000A +# define R300_RB3D_DSTCACHE_UNKNOWN_02 0x00000002 +# define R300_RB3D_DSTCACHE_UNKNOWN_0A 0x0000000A /* gap */ /* There seems to be no "write only" setting, so use Z-test = ALWAYS @@ -1395,8 +1395,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* gap */ #define R300_RB3D_ZCACHE_CTLSTAT 0x4F18 /* GUESS */ -# define R300_RB3D_ZCACHE_CTLSTAT_01 0x1 -# define R300_RB3D_ZCACHE_CTLSTAT_03 0x3 +# define R300_RB3D_ZCACHE_UNKNOWN_01 0x1 +# define R300_RB3D_ZCACHE_UNKNOWN_03 0x3 /* gap */ |