diff options
| -rw-r--r-- | shared-core/radeon_ms_bus.c | 10 | ||||
| -rw-r--r-- | shared-core/radeon_ms_cp.c | 4 | ||||
| -rw-r--r-- | shared-core/radeon_ms_drm.c | 1 | ||||
| -rw-r--r-- | shared-core/radeon_ms_fence.c | 2 |
4 files changed, 15 insertions, 2 deletions
diff --git a/shared-core/radeon_ms_bus.c b/shared-core/radeon_ms_bus.c index 6a782b1c..d50c9fb8 100644 --- a/shared-core/radeon_ms_bus.c +++ b/shared-core/radeon_ms_bus.c @@ -205,6 +205,12 @@ static int pcie_ttm_unbind(struct drm_ttm_backend *backend) int radeon_ms_agp_finish(struct drm_device *dev) { + struct drm_radeon_private *dev_priv = dev->dev_private; + + if (!dev_priv->bus_ready) { + return 0; + } + dev_priv->bus_ready = 0; drm_agp_release(dev); return 0; } @@ -217,6 +223,7 @@ int radeon_ms_agp_init(struct drm_device *dev) uint32_t agp_status; int ret; + dev_priv->bus_ready = -1; if (dev->agp == NULL) { DRM_ERROR("[radeon_ms] can't initialize AGP\n"); return -EINVAL; @@ -256,6 +263,7 @@ int radeon_ms_agp_init(struct drm_device *dev) DRM_INFO("[radeon_ms] gpu agp location 0x%08X\n", state->mc_agp_location); DRM_INFO("[radeon_ms] bus ready\n"); + dev_priv->bus_ready = 1; return 0; } @@ -328,6 +336,7 @@ int radeon_ms_pcie_init(struct drm_device *dev) struct radeon_pcie *pcie; int ret = 0; + dev_priv->bus_ready = -1; /* allocate and clear device private structure */ pcie = drm_alloc(sizeof(struct radeon_pcie), DRM_MEM_DRIVER); if (pcie == NULL) { @@ -401,6 +410,7 @@ int radeon_ms_pcie_init(struct drm_device *dev) DRM_INFO("[radeon_ms] gpu gart end 0x%08X\n", PCIE_R(PCIE_TX_GART_END_LO)); DRM_INFO("[radeon_ms] bus ready\n"); + dev_priv->bus_ready = 1; return 0; } diff --git a/shared-core/radeon_ms_cp.c b/shared-core/radeon_ms_cp.c index 7426facb..c01769bd 100644 --- a/shared-core/radeon_ms_cp.c +++ b/shared-core/radeon_ms_cp.c @@ -101,6 +101,9 @@ int radeon_ms_cp_finish(struct drm_device *dev) { struct drm_radeon_private *dev_priv = dev->dev_private; + if (!dev_priv->cp_ready) { + return 0; + } dev_priv->cp_ready = 0; radeon_ms_wait_for_idle(dev); DRM_INFO("[radeon_ms] cp idle\n"); @@ -126,6 +129,7 @@ int radeon_ms_cp_init(struct drm_device *dev) struct radeon_state *state = &dev_priv->driver_state; int ret = 0; + dev_priv->cp_ready = -1; if (dev_priv->microcode == NULL) { DRM_INFO("[radeon_ms] no microcode not starting cp"); return 0; diff --git a/shared-core/radeon_ms_drm.c b/shared-core/radeon_ms_drm.c index b22c83a7..8d0481e1 100644 --- a/shared-core/radeon_ms_drm.c +++ b/shared-core/radeon_ms_drm.c @@ -173,7 +173,6 @@ int radeon_ms_driver_load(struct drm_device *dev, unsigned long flags) return ret; } radeon_ms_gpu_restore(dev, &dev_priv->driver_state); - dev_priv->bus_ready = 1; /* initialize ttm */ ret = drm_bo_init_mm(dev, DRM_BO_MEM_TT, 0, diff --git a/shared-core/radeon_ms_fence.c b/shared-core/radeon_ms_fence.c index 96bb0858..6fcf5437 100644 --- a/shared-core/radeon_ms_fence.c +++ b/shared-core/radeon_ms_fence.c @@ -54,7 +54,7 @@ int radeon_ms_fence_emit_sequence(struct drm_device *dev, uint32_t class, struct drm_radeon_private *dev_priv = dev->dev_private; uint32_t fence_id, cmd[2], i, ret; - if (!dev_priv || !dev_priv->cp_ready) { + if (!dev_priv || dev_priv->cp_ready != 1) { return -EINVAL; } fence_id = (++dev_priv->fence_id_last); |