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authorWang Zhenyu <zhenyu.z.wang@intel.com>2006-12-04 15:48:04 +0800
committerKeith Packard <keithp@neko.keithp.com>2007-01-06 15:49:23 -0800
commitcaf8010652f77e7687c0a3b7c267ba49d0a24d74 (patch)
treeb21776131775e7ec72e5ab57c962226eaa755030 /src/mesa/drivers/dri/i965
parentf34cad0f972ca838cb223429acab54d26c2f6a57 (diff)
parent8c1cc5fd8084e7a927b15c88709a615fa16b06a3 (diff)
Merge branch 'master' into crestline
Conflicts: src/mesa/drivers/dri/i965/brw_tex_layout.c Michel Dänzer replaced the copy of the 945 mipmap layout code with that from the 945 driver directly.
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/Makefile5
-rw-r--r--src/mesa/drivers/dri/i965/brw_tex_layout.c55
l---------src/mesa/drivers/dri/i965/intel_tex_layout.c1
3 files changed, 8 insertions, 53 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile
index 213eac895c..f0a6fa5740 100644
--- a/src/mesa/drivers/dri/i965/Makefile
+++ b/src/mesa/drivers/dri/i965/Makefile
@@ -20,6 +20,7 @@ DRIVER_SOURCES = \
intel_pixel_bitmap.c \
intel_state.c \
intel_tex.c \
+ intel_tex_layout.c \
intel_tex_validate.c \
brw_aub.c \
brw_aub_playback.c \
@@ -92,8 +93,10 @@ C_SOURCES = \
ASM_SOURCES =
-
+DRIVER_DEFINES = -I../intel
include ../Makefile.template
+intel_tex_layout.o: ../intel/intel_tex_layout.c
+
symlinks:
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index bf7047f644..af1ad0f1ef 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -34,21 +34,15 @@
*/
#include "intel_mipmap_tree.h"
+#include "intel_tex_layout.h"
#include "macros.h"
-static GLuint minify( GLuint d )
-{
- return MAX2(1, d>>1);
-}
-
GLboolean brw_miptree_layout( struct intel_mipmap_tree *mt )
{
/* XXX: these vary depending on image format:
*/
/* GLint align_w = 4; */
- GLint align_h = 2;
-
switch (mt->target) {
case GL_TEXTURE_CUBE_MAP:
@@ -107,53 +101,10 @@ GLboolean brw_miptree_layout( struct intel_mipmap_tree *mt )
break;
}
- default: {
- GLuint level;
- GLuint x = 0;
- GLuint y = 0;
- GLuint width = mt->width0;
- GLuint height = mt->height0;
-
- mt->pitch = ((mt->width0 * mt->cpp + 3) & ~3) / mt->cpp;
- mt->total_height = 0;
-
- for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {
- GLuint img_height;
-
- intel_miptree_set_level_info(mt, level, 1,
- x, y,
- width,
- mt->compressed ? height/4 : height, 1);
-
- if (mt->compressed)
- img_height = MAX2(1, height/4);
- else
- img_height = MAX2(align_h, height);
-
-
- /* Because the images are packed better, the final offset
- * might not be the maximal one:
- */
- mt->total_height = MAX2(mt->total_height, y + img_height);
-
- /* Layout_below: step right after second mipmap.
- */
- if (level == mt->first_level + 1 && mt->pitch > 4) {
- x += mt->pitch / 2;
- x = (x + 3) & ~ 3;
- }
- else {
- y += img_height;
- y += align_h - 1;
- y &= ~(align_h - 1);
- }
-
- width = minify(width);
- height = minify(height);
- }
+ default:
+ i945_miptree_layout_2d(mt);
break;
}
- }
DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
mt->pitch,
mt->total_height,
diff --git a/src/mesa/drivers/dri/i965/intel_tex_layout.c b/src/mesa/drivers/dri/i965/intel_tex_layout.c
new file mode 120000
index 0000000000..fe61b44194
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/intel_tex_layout.c
@@ -0,0 +1 @@
+../intel/intel_tex_layout.c \ No newline at end of file