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-rw-r--r--src/mesa/drivers/dri/intel/intel_batchbuffer.c7
-rw-r--r--src/mesa/drivers/dri/intel/intel_blit.c8
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c65
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.h58
-rw-r--r--src/mesa/drivers/dri/intel/intel_extensions.c19
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.c4
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.c18
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_bitmap.c6
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_draw.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.c57
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.c46
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.h1
-rw-r--r--src/mesa/drivers/dri/intel/intel_span.c13
-rw-r--r--src/mesa/drivers/dri/intel/intel_state.c20
-rw-r--r--src/mesa/drivers/dri/intel/intel_swapbuffers.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_format.c4
16 files changed, 84 insertions, 246 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
index ca6e2fa5b1..2eae9b66d8 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -80,7 +80,7 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch)
batch->buf = NULL;
}
- if (!batch->buffer && intel->ttm == GL_TRUE)
+ if (!batch->buffer)
batch->buffer = malloc (intel->maxBatchSize);
batch->buf = dri_bo_alloc(intel->bufmgr, "batchbuffer",
@@ -212,7 +212,7 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
batch->reserved_space = 0;
/* Emit a flush if the bufmgr doesn't do it for us. */
- if (intel->always_flush_cache || !intel->ttm) {
+ if (intel->always_flush_cache) {
intel_batchbuffer_emit_mi_flush(batch);
used = batch->ptr - batch->map;
}
@@ -244,6 +244,9 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
if (intel->vtbl.finish_batch)
intel->vtbl.finish_batch(intel);
+ /* Check that we didn't just wrap our batchbuffer at a bad time. */
+ assert(!intel->no_batch_wrap);
+
batch->reserved_space = BATCH_RESERVED;
/* TODO: Just pass the relocation list and dma buffer up to the
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index 9f638b0ef9..da9beba030 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -52,7 +52,6 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
{
struct intel_context *intel;
- const intelScreenPrivate *intelScreen;
DBG("%s\n", __FUNCTION__);
@@ -62,8 +61,6 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
if (!intel)
return;
- intelScreen = intel->intelScreen;
-
/* The LOCK_HARDWARE is required for the cliprects. Buffer offsets
* should work regardless.
*/
@@ -499,10 +496,11 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
switch (irb->Base.Format) {
case MESA_FORMAT_ARGB8888:
case MESA_FORMAT_XRGB8888:
- clearVal = intel->ClearColor8888;
+ clearVal = PACK_COLOR_8888(clear[3], clear[0],
+ clear[1], clear[2]);
break;
case MESA_FORMAT_RGB565:
- clearVal = intel->ClearColor565;
+ clearVal = PACK_COLOR_565(clear[0], clear[1], clear[2]);
break;
case MESA_FORMAT_ARGB4444:
clearVal = PACK_COLOR_4444(clear[3], clear[0],
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 26ff11ba61..02e0cc7b33 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -68,7 +68,7 @@ int INTEL_DEBUG = (0);
#endif
-#define DRIVER_DATE "20091221 2009Q4"
+#define DRIVER_DATE "20091221 DEVELOPMENT"
#define DRIVER_DATE_GEM "GEM " DRIVER_DATE
@@ -176,9 +176,7 @@ intelGetString(GLcontext * ctx, GLenum name)
break;
}
- (void) driGetRendererString(buffer, chipset,
- (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE,
- 0);
+ (void) driGetRendererString(buffer, chipset, DRIVER_DATE_GEM, 0);
return (GLubyte *) buffer;
default:
@@ -601,6 +599,7 @@ intelInitContext(struct intel_context *intel,
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
int fthrottle_mode;
+ int bo_reuse_mode;
if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
functions, (void *) intel)) {
@@ -614,12 +613,25 @@ intelInitContext(struct intel_context *intel,
intel->sarea = intelScreen->sarea;
intel->driContext = driContextPriv;
- if (IS_965(intel->intelScreen->deviceID))
+ if (IS_965(intel->intelScreen->deviceID)) {
intel->gen = 4;
- else if (IS_9XX(intel->intelScreen->deviceID))
+ } else if (IS_9XX(intel->intelScreen->deviceID)) {
intel->gen = 3;
- else
+ if (IS_945(intel->intelScreen->deviceID)) {
+ intel->is_945 = GL_TRUE;
+ }
+ } else {
intel->gen = 2;
+ }
+
+ if (IS_IGDNG(intel->intelScreen->deviceID)) {
+ intel->is_ironlake = GL_TRUE;
+ intel->needs_ff_sync = GL_TRUE;
+ intel->has_luminance_srgb = GL_TRUE;
+ } else if (IS_G4X(intel->intelScreen->deviceID)) {
+ intel->has_luminance_srgb = GL_TRUE;
+ intel->is_g4x = GL_TRUE;
+ }
/* Dri stuff */
intel->hHWContext = driContextPriv->hHWContext;
@@ -635,18 +647,14 @@ intelInitContext(struct intel_context *intel,
intel->maxBatchSize = BATCH_SZ;
intel->bufmgr = intelScreen->bufmgr;
- intel->ttm = intelScreen->ttm;
- if (intel->ttm) {
- int bo_reuse_mode;
- bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
- switch (bo_reuse_mode) {
- case DRI_CONF_BO_REUSE_DISABLED:
- break;
- case DRI_CONF_BO_REUSE_ALL:
- intel_bufmgr_gem_enable_reuse(intel->bufmgr);
- break;
- }
+ bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
+ switch (bo_reuse_mode) {
+ case DRI_CONF_BO_REUSE_DISABLED:
+ break;
+ case DRI_CONF_BO_REUSE_ALL:
+ intel_bufmgr_gem_enable_reuse(intel->bufmgr);
+ break;
}
/* This doesn't yet catch all non-conformant rendering, but it's a
@@ -733,12 +741,6 @@ intelInitContext(struct intel_context *intel,
intel->RenderIndex = ~0;
fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
- intel->irqsEmitted = 0;
-
- intel->do_irqs = (intel->intelScreen->irq_active &&
- fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
-
- intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
if (intel->gen >= 4 && !intel->intelScreen->irq_active) {
_mesa_printf("IRQs not active. Exiting\n");
@@ -1058,21 +1060,6 @@ intelContendedLock(struct intel_context *intel, GLuint flags)
sarea->ctxOwner = me;
}
- /* If the last consumer of the texture memory wasn't us, notify the fake
- * bufmgr and record the new owner. We should have the memory shared
- * between contexts of a single fake bufmgr, but this will at least make
- * things correct for now.
- */
- if (!intel->ttm && sarea->texAge != intel->hHWContext) {
- sarea->texAge = intel->hHWContext;
- intel_bufmgr_fake_contended_lock_take(intel->bufmgr);
- if (INTEL_DEBUG & DEBUG_BATCH)
- intel_decode_context_reset();
- if (INTEL_DEBUG & DEBUG_BUFMGR)
- fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n",
- sarea->ctxOwner, intel->hHWContext);
- }
-
/* Drawable changed?
*/
if (dPriv && intel->lastStamp != dPriv->lastStamp) {
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index eb7be7ddd0..e85886db82 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -135,14 +135,6 @@ struct intel_context
struct intel_region * draw_region,
struct intel_region * depth_region);
- void (*meta_draw_quad)(struct intel_context *intel,
- GLfloat x0, GLfloat x1,
- GLfloat y0, GLfloat y1,
- GLfloat z,
- GLuint color, /* ARGB32 */
- GLfloat s0, GLfloat s1,
- GLfloat t0, GLfloat t1);
-
void (*meta_color_mask) (struct intel_context * intel, GLboolean);
void (*meta_stencil_replace) (struct intel_context * intel,
@@ -184,17 +176,18 @@ struct intel_context
* Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
*/
int gen;
+ GLboolean needs_ff_sync;
+ GLboolean is_ironlake;
+ GLboolean is_g4x;
+ GLboolean is_945;
+ GLboolean has_luminance_srgb;
+
+ int urb_size;
struct intel_region *front_region;
struct intel_region *back_region;
struct intel_region *depth_region;
- /**
- * This value indicates that the kernel memory manager is being used
- * instead of the fake client-side memory manager.
- */
- GLboolean ttm;
-
struct intel_batchbuffer *batch;
drm_intel_bo *first_post_swapbuffers_batch;
GLboolean no_batch_wrap;
@@ -217,10 +210,6 @@ struct intel_context
char *prevLockFile;
int prevLockLine;
- GLuint ClearColor565;
- GLuint ClearColor8888;
-
-
/* Offsets of fields within the current vertex:
*/
GLuint coloroffset;
@@ -237,6 +226,7 @@ struct intel_context
GLboolean hw_stipple;
GLboolean depth_buffer_is_float;
GLboolean no_rast;
+ GLboolean no_hw;
GLboolean always_flush_batch;
GLboolean always_flush_cache;
@@ -302,13 +292,6 @@ struct intel_context
GLboolean use_early_z;
drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */
- int perf_boxes;
-
- GLuint do_usleeps;
- int do_irqs;
- GLuint irqsEmitted;
-
- GLboolean scissor;
drm_clip_rect_t draw_rect;
drm_clip_rect_t scissor_rect;
@@ -325,8 +308,6 @@ struct intel_context
GLuint lastStamp;
- GLboolean no_hw;
-
/**
* Configuration cache
*/
@@ -374,29 +355,6 @@ do { \
} while (0)
/* ================================================================
- * Color packing:
- */
-
-#define INTEL_PACKCOLOR4444(r,g,b,a) \
- ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
-
-#define INTEL_PACKCOLOR1555(r,g,b,a) \
- ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
- ((a) ? 0x8000 : 0))
-
-#define INTEL_PACKCOLOR565(r,g,b) \
- ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
-
-#define INTEL_PACKCOLOR8888(r,g,b,a) \
- ((a<<24) | (r<<16) | (g<<8) | b)
-
-#define INTEL_PACKCOLOR(format, r, g, b, a) \
-(format == DV_PF_555 ? INTEL_PACKCOLOR1555(r,g,b,a) : \
- (format == DV_PF_565 ? INTEL_PACKCOLOR565(r,g,b) : \
- (format == DV_PF_8888 ? INTEL_PACKCOLOR8888(r,g,b,a) : \
- 0)))
-
-/* ================================================================
* From linux kernel i386 header files, copes with odd sizes better
* than COPY_DWORDS would:
* XXX Put this in src/mesa/main/imports.h ???
diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c
index 48cdae509e..5ac5ce10af 100644
--- a/src/mesa/drivers/dri/intel/intel_extensions.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions.c
@@ -79,6 +79,7 @@ static const struct dri_extension card_extensions[] = {
{ "GL_ARB_half_float_pixel", NULL },
{ "GL_ARB_map_buffer_range", GL_ARB_map_buffer_range_functions },
{ "GL_ARB_multitexture", NULL },
+ { "GL_ARB_pixel_buffer_object", NULL },
{ "GL_ARB_point_parameters", GL_ARB_point_parameters_functions },
{ "GL_ARB_point_sprite", NULL },
{ "GL_ARB_shader_objects", GL_ARB_shader_objects_functions },
@@ -104,6 +105,8 @@ static const struct dri_extension card_extensions[] = {
{ "GL_EXT_blend_logic_op", NULL },
{ "GL_EXT_blend_subtract", NULL },
{ "GL_EXT_cull_vertex", GL_EXT_cull_vertex_functions },
+ { "GL_EXT_framebuffer_blit", GL_EXT_framebuffer_blit_functions },
+ { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
{ "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
{ "GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions },
{ "GL_EXT_packed_depth_stencil", NULL },
@@ -175,14 +178,6 @@ static const struct dri_extension arb_oq_extensions[] = {
{ NULL, NULL }
};
-
-static const struct dri_extension ttm_extensions[] = {
- { "GL_ARB_pixel_buffer_object", NULL },
- { "GL_EXT_framebuffer_blit", GL_EXT_framebuffer_blit_functions },
- { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
- { NULL, NULL }
-};
-
static const struct dri_extension fragment_shader_extensions[] = {
{ "GL_ARB_fragment_shader", NULL },
{ NULL, NULL }
@@ -201,14 +196,10 @@ intelInitExtensions(GLcontext *ctx)
*/
driInitExtensions(ctx, card_extensions, GL_FALSE);
- if (intel->ttm)
- driInitExtensions(ctx, ttm_extensions, GL_FALSE);
-
- if (IS_965(intel->intelScreen->deviceID))
+ if (intel->gen >= 4)
driInitExtensions(ctx, brw_extensions, GL_FALSE);
- if (IS_915(intel->intelScreen->deviceID)
- || IS_945(intel->intelScreen->deviceID)) {
+ if (intel->gen == 3) {
driInitExtensions(ctx, i915_extensions, GL_FALSE);
if (driQueryOptionb(&intel->optionCache, "fragment_shader"))
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index 608f75b824..fc502a87d3 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -398,8 +398,6 @@ static GLboolean
intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb,
struct gl_texture_image *texImage)
{
- gl_format texFormat;
-
if (texImage->TexFormat == MESA_FORMAT_ARGB8888) {
irb->Base.DataType = GL_UNSIGNED_BYTE;
DBG("Render to RGBA8 texture OK\n");
@@ -435,8 +433,6 @@ intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb,
irb->Base.Format = texImage->TexFormat;
- texFormat = texImage->TexFormat;
-
irb->Base.InternalFormat = texImage->InternalFormat;
irb->Base._BaseFormat = _mesa_base_fbo_format(ctx, irb->Base.InternalFormat);
irb->Base.Width = texImage->Width;
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index abb3024bfb..82e4150c6a 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -87,7 +87,7 @@ intel_miptree_create_internal(struct intel_context *intel,
mt->pitch = 0;
#ifdef I915
- if (IS_945(intel->intelScreen->deviceID))
+ if (intel->is_945)
ok = i945_miptree_layout(intel, mt, tiling);
else
ok = i915_miptree_layout(intel, mt, tiling);
@@ -224,16 +224,12 @@ int intel_miptree_pitch_align (struct intel_context *intel,
if (!mt->compressed) {
int pitch_align;
- if (intel->ttm) {
- /* XXX: Align pitch to multiple of 64 bytes for now to allow
- * render-to-texture to work in all cases. This should probably be
- * replaced at some point by some scheme to only do this when really
- * necessary.
- */
- pitch_align = 64;
- } else {
- pitch_align = 4;
- }
+ /* XXX: Align pitch to multiple of 64 bytes for now to allow
+ * render-to-texture to work in all cases. This should probably be
+ * replaced at some point by some scheme to only do this when really
+ * necessary.
+ */
+ pitch_align = 64;
if (tiling == I915_TILING_X)
pitch_align = 512;
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index 204a233173..d0bcc2a360 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -228,10 +228,9 @@ do_blit_bitmap( GLcontext *ctx,
UNCLAMPED_FLOAT_TO_UBYTE(ubcolor[3], tmpColor[3]);
if (dst->cpp == 2)
- color = INTEL_PACKCOLOR565(ubcolor[0], ubcolor[1], ubcolor[2]);
+ color = PACK_COLOR_565(ubcolor[0], ubcolor[1], ubcolor[2]);
else
- color = INTEL_PACKCOLOR8888(ubcolor[0], ubcolor[1],
- ubcolor[2], ubcolor[3]);
+ color = PACK_COLOR_8888(ubcolor[3], ubcolor[0], ubcolor[1], ubcolor[2]);
if (!intel_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F))
return GL_FALSE;
@@ -504,6 +503,7 @@ intel_texture_bitmap(GLcontext * ctx,
meta_restore_fragment_program(&intel->meta);
meta_restore_vertex_program(&intel->meta);
+ _mesa_ActiveTextureARB(GL_TEXTURE0_ARB + old_active_texture);
_mesa_PopClientAttrib();
_mesa_PopAttrib();
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_draw.c b/src/mesa/drivers/dri/intel/intel_pixel_draw.c
index 9b382e3622..b870e9315e 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_draw.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_draw.c
@@ -69,7 +69,6 @@ intel_stencil_drawpixels(GLcontext * ctx,
GLfloat vertices[4][2];
struct intel_renderbuffer *irb;
struct intel_renderbuffer *depth_irb;
- struct gl_renderbuffer *rb;
struct gl_pixelstore_attrib old_unpack;
GLstencil *stencil_pixels;
int row, y1, y2;
@@ -170,7 +169,6 @@ intel_stencil_drawpixels(GLcontext * ctx,
*/
depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
irb = intel_create_renderbuffer(MESA_FORMAT_ARGB8888);
- rb = &irb->Base;
irb->Base.Width = depth_irb->Base.Width;
irb->Base.Height = depth_irb->Base.Height;
intel_renderbuffer_set_region(irb, depth_irb->region);
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index 80975163d4..d6b9dc4446 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -542,55 +542,18 @@ intel_recreate_static(struct intel_context *intel,
region->buffer = NULL;
}
- if (intel->ttm) {
- assert(region_desc->bo_handle != -1);
- region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
- name,
- region_desc->bo_handle);
-
- ret = dri_bo_get_tiling(region->buffer, &region->tiling,
- &region->bit_6_swizzle);
- if (ret != 0) {
- fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
- region_desc->bo_handle, name, strerror(-ret));
- intel_region_release(&region);
- return NULL;
- }
- } else {
- if (region->classic_map != NULL) {
- drmUnmap(region->classic_map,
- region->pitch * region->cpp * region->height);
- region->classic_map = NULL;
- }
- ret = drmMap(intel->driFd, region_desc->handle,
- region->pitch * region->cpp * region->height,
- &region->classic_map);
- if (ret != 0) {
- fprintf(stderr, "Failed to drmMap %s buffer\n", name);
- free(region);
- return NULL;
- }
-
- region->buffer = intel_bo_fake_alloc_static(intel->bufmgr,
+ assert(region_desc->bo_handle != -1);
+ region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
name,
- region_desc->offset,
- region->pitch * region->cpp *
- region->height,
- region->classic_map);
-
- /* The sarea just gives us a boolean for whether it's tiled or not,
- * instead of which tiling mode it is. Guess.
- */
- if (region_desc->tiled) {
- if (intel->gen >= 4 && region_desc == &intelScreen->depth)
- region->tiling = I915_TILING_Y;
- else
- region->tiling = I915_TILING_X;
- } else {
- region->tiling = I915_TILING_NONE;
- }
+ region_desc->bo_handle);
- region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
+ ret = dri_bo_get_tiling(region->buffer, &region->tiling,
+ &region->bit_6_swizzle);
+ if (ret != 0) {
+ fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
+ region_desc->bo_handle, name, strerror(-ret));
+ intel_region_release(&region);
+ return NULL;
}
assert(region->buffer != NULL);
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 789135b49f..68e8db1de6 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -605,9 +605,7 @@ intelFillInModes(__DRIscreenPrivate *psp,
static GLboolean
intel_init_bufmgr(intelScreenPrivate *intelScreen)
{
- GLboolean gem_disable = getenv("INTEL_NO_GEM") != NULL;
int gem_kernel = 0;
- GLboolean gem_supported;
struct drm_i915_getparam gp;
__DRIscreenPrivate *spriv = intelScreen->driScrnPriv;
int num_fences = 0;
@@ -622,43 +620,19 @@ intel_init_bufmgr(intelScreenPrivate *intelScreen)
/* If we've got a new enough DDX that's initializing GEM and giving us
* object handles for the shared buffers, use that.
*/
- intelScreen->ttm = GL_FALSE;
- if (intelScreen->driScrnPriv->dri2.enabled)
- gem_supported = GL_TRUE;
- else if (intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
- gem_kernel &&
- intelScreen->front.bo_handle != -1)
- gem_supported = GL_TRUE;
- else
- gem_supported = GL_FALSE;
-
- if (!gem_disable && gem_supported) {
- intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
- if (intelScreen->bufmgr != NULL)
- intelScreen->ttm = GL_TRUE;
+ if (!intelScreen->driScrnPriv->dri2.enabled &&
+ intelScreen->driScrnPriv->ddx_version.minor < 9) {
+ fprintf(stderr, "[%s:%u] Error initializing GEM.\n",
+ __func__, __LINE__);
+ return GL_FALSE;
}
+
+ intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
/* Otherwise, use the classic buffer manager. */
if (intelScreen->bufmgr == NULL) {
- if (gem_disable) {
- _mesa_warning(NULL, "GEM disabled. Using classic.");
- } else {
- _mesa_warning(NULL,
- "Failed to initialize GEM. Falling back to classic.");
- }
-
- if (intelScreen->tex.size == 0) {
- fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
- __func__, __LINE__);
- return GL_FALSE;
- }
-
- intelScreen->bufmgr =
- intel_bufmgr_fake_init(spriv->fd,
- intelScreen->tex.offset,
- intelScreen->tex.map,
- intelScreen->tex.size,
- (unsigned int * volatile)
- &intelScreen->sarea->last_dispatch);
+ fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
+ __func__, __LINE__);
+ return GL_FALSE;
}
if (intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences))
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index a9b9e109a6..14ca0903b6 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -77,7 +77,6 @@ typedef struct
GLboolean no_hw;
GLboolean no_vbo;
- int ttm;
dri_bufmgr *bufmgr;
GLboolean kernel_exec_fencing;
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
index 34c3d9df74..d1681e9088 100644
--- a/src/mesa/drivers/dri/intel/intel_span.c
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -613,15 +613,7 @@ intel_set_span_functions(struct intel_context *intel,
struct gl_renderbuffer *rb)
{
struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb;
- uint32_t tiling;
-
- /* If in GEM mode, we need to do the tile address swizzling ourselves,
- * instead of the fence registers handling it.
- */
- if (intel->ttm)
- tiling = irb->region->tiling;
- else
- tiling = I915_TILING_NONE;
+ uint32_t tiling = irb->region->tiling;
if (intel->intelScreen->kernel_exec_fencing) {
switch (irb->Base.Format) {
@@ -667,6 +659,9 @@ intel_set_span_functions(struct intel_context *intel,
return;
}
+ /* If in GEM mode, we need to do the tile address swizzling ourselves,
+ * instead of the fence registers handling it.
+ */
switch (irb->Base.Format) {
case MESA_FORMAT_RGB565:
switch (tiling) {
diff --git a/src/mesa/drivers/dri/intel/intel_state.c b/src/mesa/drivers/dri/intel/intel_state.c
index 4ee742377d..aefae53eb2 100644
--- a/src/mesa/drivers/dri/intel/intel_state.c
+++ b/src/mesa/drivers/dri/intel/intel_state.c
@@ -196,25 +196,6 @@ intel_translate_logic_op(GLenum opcode)
}
}
-
-static void
-intelClearColor(GLcontext *ctx, const GLfloat color[4])
-{
- struct intel_context *intel = intel_context(ctx);
- GLubyte clear[4];
-
- CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]);
- CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]);
- CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
- CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
-
- /* compute both 32 and 16-bit clear values */
- intel->ClearColor8888 = INTEL_PACKCOLOR8888(clear[0], clear[1],
- clear[2], clear[3]);
- intel->ClearColor565 = INTEL_PACKCOLOR565(clear[0], clear[1], clear[2]);
-}
-
-
/* Fallback to swrast for select and feedback.
*/
static void
@@ -229,5 +210,4 @@ void
intelInitStateFuncs(struct dd_function_table *functions)
{
functions->RenderMode = intelRenderMode;
- functions->ClearColor = intelClearColor;
}
diff --git a/src/mesa/drivers/dri/intel/intel_swapbuffers.c b/src/mesa/drivers/dri/intel/intel_swapbuffers.c
index 7d035b9f6e..5ae1240718 100644
--- a/src/mesa/drivers/dri/intel/intel_swapbuffers.c
+++ b/src/mesa/drivers/dri/intel/intel_swapbuffers.c
@@ -56,7 +56,7 @@ intelFixupVblank(struct intel_context *intel, __DRIdrawablePrivate *dPriv)
.y2 = sarea->planeB_y + sarea->planeB_h };
GLint areaA = driIntersectArea( drw_rect, planeA_rect );
GLint areaB = driIntersectArea( drw_rect, planeB_rect );
- GLuint flags = dPriv->vblFlags;
+ GLuint flags;
/* Update vblank info
*/
diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c b/src/mesa/drivers/dri/intel/intel_tex_format.c
index 87efb72cc5..a7c6c45ffe 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_format.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_format.c
@@ -173,13 +173,13 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat,
return MESA_FORMAT_SARGB8;
case GL_SLUMINANCE_EXT:
case GL_SLUMINANCE8_EXT:
- if (IS_G4X(intel->intelScreen->deviceID))
+ if (intel->has_luminance_srgb)
return MESA_FORMAT_SL8;
else
return MESA_FORMAT_SARGB8;
case GL_SLUMINANCE_ALPHA_EXT:
case GL_SLUMINANCE8_ALPHA8_EXT:
- if (IS_G4X(intel->intelScreen->deviceID))
+ if (intel->has_luminance_srgb)
return MESA_FORMAT_SLA8;
else
return MESA_FORMAT_SARGB8;
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-07 18:06:03 +0000