Age | Commit message (Collapse) | Author |
|
|
|
By avoiding the repeated relocation buffer creation/map/unmap/destroy for each
new batch buffer, this improves OpenArena framerates by 30%. Caching batch
buffers themselves doesn't appear to be a significant performance win over
this change.
|
|
We have two consumers of relocations. One is static state buffers, which
want the same relocation every time. The other is the batchbuffer, which gets
thrown out immediately after submit. This lets us reduce repeated computation
for static state buffers, and clean up the code by moving relocations nearer
to where the state buffer is computed.
|
|
|
|
MRD computation is now changed in mesa core
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
This reverts commit 8bb9ae3693362a302206255c61f512d942df9bbf.
Validating our kernel buffers with the caching off in flags but on in mask
means that the kernel migrates the buffer to be uncached, which is undesired.
|
|
|
|
The 'mask' value used in the validation operation specifies which of the
'flags' bits are being modified. Buffer validation wants to pass the memory
type and access mode (rwx) to the kernel so that the buffer will be placed
correctly, and so that the right kind of fence will be created (read vs
write). That means we actually want a constant mask for these operations,
and not something computed from the bits coming in. The constant we want is
DRM_BO_MASK_MEM | DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_EXE.
|
|
Without this, the WM binding tables would all collide, for example. Improves
openarena performance by around 2%.
|
|
|
|
|
|
|
|
this is correct, there is another issue with sw fallbacks
This reverts commit cc50edbca2fd3111f9987d4117fa6656599d79dc.
|
|
|
|
|
|
|
|
|
|
Also add some extra tests to the shader_api regression tests
|
|
|
|
|
|
- return GL_INVALID_OPERATION instead of GL_INVALID_VALUE if location is bad
- correct the type-checking of uniforms from my previous commit
- accept location of -1 in _mesa_uniform_matrix
|
|
- fix sizes for GL_FLOAT_MAT2x3 and GL_FLOAT_MAT4x3 in sizeof_glsl_type
- fix size returns in _mesa_get_active_attrib
- fix out-of-bounds array access to vec_types in _mesa_get_active_attrib
- fix queries of matrix uniforms in _mesa_get_uniformfv
- fix _mesa_get_uniformfv to only return one base, even from an array
- allow location == -1 in _mesa_uniform
- validate types in _mesa_uniform
- allow array overruns in _mesa_uniform
|
|
|
|
|
|
|
|
|
|
I've no idea why I added this so I'll have to spend time tracking it down
|
|
Just like configs/default, the version number in configure.ac needs to
be bumped for releases. Maybe later we can figure out how to scrape the
version from configs/default into configure.ac.
|
|
|
|
|
|
|
|
In order to optimize DrawPixels, the i915 texenv program isn't
applied to swrast DrawPixels in the i915 driver. This causes this
program isn't applied to any following swrast functions. Resetting
the swrast state fixes this issue. Fix #13614
|
|
|
|
Two new configure options to add -m32 or -m64 to the CFLAGS and CXXFLAGS
when GCC is in use. By default, the user supplied options are
environment variables are respected, but these options are quick helps
for the common case of x86/x86_64 using GCC.
|
|
fix #11925
|
|
The values passed to put_values_z24 are GLuint,
not GLubyte. fix #13543
|
|
|
|
This fixes 3D rendering on x700 SE chips. Reported
by Kano.
|
|
Most of the options available from configure are documented on the
autoconf.html. This page is reached as an alternative provided on the
install.html page. An FAQ about why there is no configure script has
been removed.
|
|
primitive needs to include the begin/end flags (broken since vbo-0.2). Should
fix missing first/last line segment on gamma, i810, i915, mga, r200, radeon,
s3v, savage, unichrome (r300 already correct). Tested on r200, fixes #13527.
|
|
|
|
Note that this does not enable GL_EXT_stencil_two_side, because Mesa's computed
_TestTwoSide ends up respecting only STENCIL_TEST_TWO_SIDE_EXT (defaults to
GL_FALSE), even if the application uses only GL 2.0 / ATI entrypoints.
|