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This makes some code cleaner, and we can now easily
do CEIL and TRUNC.
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For TXP we need to divide texture coords by their w component, or
use the coords' 1/w in the perspective interpolation instruction.
This also tries to support 1D, 3D and CUBE textures, and lets the
instruction only load the components that are used.
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Use different buffers for immds, FP params, and VP params.
One has to map constant buffer indices in shader code to buffers
defined via CB_DEF. In principle, we could use more buffers so
we'd have to change the shader code less frequently.
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Since we stopped using alloc_temp to get hw indices for FP attrs
there shouldn't be any non-deallocated temps left.
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Since we know when we don't use a TEMP or FP ATTR register anymore,
we can release their hw resources early.
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Immediates are inlined now where possible, so we need to set
pc->allow32 to FALSE in LIT where we have the conditional MOV,
since immediates swallow the predicate bits.
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I chose to just convert unpaired 32 bit length instructions
after parsing all instructions, although it might be possible
to determine beforehand whether there would be any lone ones,
and then even do some swapping to bring them together ...
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This would have happened in p.e. ADD TEMP[0], TEMP[0].xyxy, TEMP[1]
or RCP/RSQ TEMP[i], TEMP[i].
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Depth output in fragment programs should end up in the first
register after the color outputs.
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VP outputs that should be loadable in the FP are mapped to
interpolant indices by HPOS, COL0 etc.; of course HPOS is
always written, so the highest byte of 1988 is a bitmask that
selects which components of HPOS are used for interpolants,
i.e. the FP inputs in COL0 start at index POPCNT(1988[24:28]).
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Record interpolation mode for attributes while parsing declarations,
and also remember the indices of FP color inputs and FP depth output,
which has to end up in the highest output register.
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We now inspect the TGSI instructions in tx_prep to determine where
temps and FP attrs are last accessed.
This will enable us to reclaim some temporaries early and we also
use it to omit pre-loading FP attributes that aren't used.
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We could do even better (like just allocating 1 value in alloc_immd),
but that's fine for now I guess.
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According to tgsi-instruction-set.txt, if they are written, z and w
should be set to 0 and 1 respectively in SCS, and w to 1.0 in XPD.
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Use the first vertex, not the last.
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In spu_tri.c:setup_sort_vertices() triangles are culled after the
vertices are sorted. This patch moves the check a little earlier
and performs the actual check a little faster through intrinsics and
a little trickery.
Reduced code size and less work is done before a triangle is deemed
OK to skip.
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It was taking approximately 50 cycles to extract the vertex indices,
calculate the vertex_header pointers and call tri_draw() for each
three vertices - .
Unrolled, it takes less than 100 cycles to extract, unpack,
calculate pointers and call tri_draw() eight times. It does have a
nasty jump-tabled switch. I'm sure that there's a better way...
Code size of spu_render.o gets larger due to the extra constants and
work in the inner loop, there are extra stack saves and loads
because there are more registers in use, and an assert. spu_tri.o
gets a little smaller.
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I feel so unclean.
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Goddammit. This cannot be the "easy way." :C
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Seems like this file is the source of all bad logic. (Pun intended.)
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Less briefly... Shaders need to be recompiled if their constantbuf
offsets have changed. However, since we only change them from shaders if
immediates need to be emitted, we shouldn't bother if the shader doesn't
use immediates.
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Still not correct, but really I don't care.
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Per 74cb2aba on xf86-video-ati.
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This fixes some silent problems in current libdrm_radeon.
surface_copy still locks up hard.
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Again, thanks to agd5f.
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This makes glxgears draw properly with SW TCL.
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Conflicts:
Makefile
src/mesa/main/version.h
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Before you get all excited, this is *not* to be construed as actual support
for GLSL shaders. The GL version is still 1.3, and stuff still sucks. Just
flicking it on so that it can be tested and developed a bit easier.
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Oh, look, GLSL instructions. I wonder what I'll do next.
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HW trig does a premultiply by 2pi, where Mesa does another premultiply by pi.
This is a problem.
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See the previous commit for an explanation. This is just all the support code
for GB_TILE_CONFIG.
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This accompanies kernel patches that make GB_TILE_CONFIG's various members
completely controlled in DRM.
GB_TILE_CONFIG has the following controls:
- The number of GB (pixel) pipes enabled
- The size and style of tiling
- Subpixel precision (either 1/12 or 1/16)
Per airlied and glisse, userspace and kernel will now agree (always) on
a subpixel precision of 1/12, and tiling will always be kernel-controlled.
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GA_ENHANCE is now the kernel's problem.
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Lops work fine as long as HW TCL is off. (I think I know why.)
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