| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2007-10-04 | [965] Replace various alignment code with a shared ALIGN() macro. | Eric Anholt | |
| In the process, fix some alignment issues: - Scratch space allocation was aligned into units of 1KB, while the allocation wanted units of bytes, so we never allocated enough space for scratch. - GRF register count was programmed as ALIGN(val - 1, 16) / 16 instead of ALIGN(val, 16) / 16 - 1, which overcounted for val != 16n+1. | |||
| 2007-09-27 | [965] Add batchbuffer dumping under INTEL_DEBUG=bat, like 915. | Eric Anholt | |
| 2007-09-27 | [965] Remove AUB file support. | Eric Anholt | |
| This code existed to dump logs of hardware access to be replayed in simulation. Since we have real hardware now, it's not really needed. | |||
| 2007-09-12 | i965: translate shadow compare function into correct | Xiang, Haihao | |
| internal function to match the EXT_shadow_funs spec. fix bug#11925 | |||
| 2007-08-29 | i965: store read drawable info in intel_context. Some OpenGL | Xiang, Haihao | |
| operations are based on read drawable. fix bug#10136. | |||
| 2007-05-31 | i965: Add pci info for 965GME/GLE chip. | Wang Zhenyu | |
| 2007-05-22 | Replace initInitState() with _mesa_init_driver_state(). | Brian | |
| 2007-02-25 | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | |
| 2007-02-02 | Add Intel 965GM chipset info | Wang Zhenyu | |
| 2007-02-02 | Revert origin crestline pci id patch | Wang Zhenyu | |
| 2007-01-26 | ARB_Occlusion_query should support multiple query at same time | Zou Nan hai | |
| 2007-01-24 | 965 ARB_Occlusion_query fix | Zou Nan hai | |
| 2007-01-18 | 1. Fix bug #155 | Zou Nan hai | |
| 2. I notice multiple ARB_occlusion_query should be able to overlap according to spec. 3. Declaring extern variables in a .c file is evil, fix it. | |||
| 2007-01-06 | i965: ARB_occlusion_query support | Wang Zhenyu | |
| Signed-off-by: Keith Packard <keithp@neko.keithp.com> | |||
| 2006-12-11 | ARB_occlusion_query support | Wang Zhenyu | |
| 2006-12-10 | adding pci id of Crestline | Wang Zhenyu | |
| 2006-12-02 | Structure CopyPixels similarly to i915 do_texture_copypixels, to ease future ↵ | Gary Wong | |
| unification. | |||
| 2006-11-29 | Add accelerated CopyPixels for non-overlapping, 1:1 blits. | Eric Anholt | |
| Submitted by Gary Wong <gtw@gnu.org> | |||
| 2006-10-13 | Use unsigned long cast for checking pointer alignment, fixes x64 warnings. | Keith Whitwell | |
| 2006-10-05 | Accelerate glBitmap with a color expand blit. Nice speedup for demos | Keith Whitwell | |
| like 'fire' that display a help message or fps number this way. | |||
| 2006-09-20 | remove some dead code | Keith Whitwell | |
| 2006-09-20 | add accelerated glCopyPixels path | Keith Whitwell | |
| 2006-09-07 | Make sure bmBufferOffset is called for all active buffers every time | Keith Whitwell | |
| we render. Currenly requires that some state be re-examined after every LOCK_HARDWARE(). | |||
| 2006-09-06 | Simplify the immediate and displaylist code. Treat VertexAttrib*ARB | Keith Whitwell | |
| as non-aliasing and cope with the >32 attributes that result, taking materials into account. | |||
| 2006-08-09 | Add Intel i965G/Q DRI driver. | Eric Anholt | |
| This driver comes from Tungsten Graphics, with a few further modifications by Intel. | |||
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index : Mesa | |
| My Mesa repository | Thomas White |
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