Age | Commit message (Collapse) | Author | |
---|---|---|---|
2007-07-21 | Remove ctx->Point._Size and ctx->Line._Width. | Brian | |
The clamping for these values depends on whether we're drawing AA or non-AA points, lines. Defer clamping until drawing time. Drivers could compute and keep clamped AA and clamped non-AA values if desired. | |||
2007-07-04 | fix LogicOp/bitmap problem, bug 11133 | Eric Anholt | |
2007-06-11 | Replace texobj->Complete with texobj->_Complete since it's a derived field. | Brian | |
2007-05-31 | i965: Add pci info for 965GME/GLE chip. | Wang Zhenyu | |
2007-05-22 | Replace initInitState() with _mesa_init_driver_state(). | Brian | |
2007-05-22 | include swrast_setup/swrast_setup.h to silence warning | Brian | |
2007-05-22 | fog: fix potential issues with generated vp using fog | Roland Scheidegger | |
Change the generated vertex programs (tnl/brw) to follow the same logic as the tnl fog wrt using absolute value, and sync them up a bit (untested). | |||
2007-05-03 | add some #includes to silence warnings | Brian | |
2007-03-30 | Merge branch 'crestline-qa', adding support for the 965GM chipset. | Eric Anholt | |
2007-03-27 | Fix compile error | Zou Nan hai | |
2007-03-26 | merge of glsl-compiler-1 branch | Brian | |
2007-03-26 | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | |
2007-03-25 | i965: The given urb layout(maximal size of urb entries and the | Xiang, Haihao | |
values for nr of entries) should meet the requirement. | |||
2007-03-22 | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | |
2007-03-22 | fix for bug#10339 | Xiang, Haihao | |
StateFlags has been updated in _mesa_add_state_reference | |||
2007-03-21 | merge from master | Brian | |
2007-03-21 | fix copy and paste bug from last commit in fog generation code for GL_LINEAR fog | Roland Scheidegger | |
2007-03-21 | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | |
2007-03-20 | fix for bug#10347 | Xiang, Haihao | |
not sure which brw surface for DXT3 & DXT5, so restore the previous choice.(changed in commit 84081774e62a8af18e6bf894ea69f63b97dcfe96) | |||
2007-03-19 | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | |
2007-03-18 | i965: fix for FXT1 & S3TC texture format | Xiang, Haihao | |
choose the right mesa texformat for FXT1 & S3TC | |||
2007-03-14 | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | |
2007-03-13 | sync up t_vp_build.c brw_vs_tnl.c a bit | Roland Scheidegger | |
Bring over the optimizations for fog and normalized spot dir from t_vp_build.c to brw_vs_tnl.c. Likewise, port a fix for point size calc from brw_vs_tnl.c to t_vp_build.c (use ABS(eyez) instead of -eyez). Leave the now differing point size calcs alone though, not sure what's better (it's basically MOV, ABS, MUL, DP3 vs. ABS, MAD, MAD). | |||
2007-03-12 | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | |
2007-03-11 | fix for bug#10196 | Xiang, Haihao | |
Compute half if LOCAL_VIEWER is enabled and the light is a directional source. | |||
2007-03-09 | Merge branch 'origin' into glsl-compiler-1 | Brian | |
Conflicts: src/mesa/main/context.c | |||
2007-03-07 | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | |
2007-03-06 | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | |
2007-03-06 | Fix/improve framebuffer object reference counting. | Brian | |
Use _mesa_reference_framebuffer() and _mesa_unreference_framebuffer() functions to be sure reference counting is done correctly. Additional assertions are done too. Note _mesa_dereference_framebuffer() renamed to "unreference" as that's more accurate. | |||
2007-03-06 | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | |
2007-03-06 | fix for bug#10182 | Xiang, Haihao | |
call _mesa_dereference_framebuffer instead of _mesa_dereference_framebuffer in i810, i915, i915tex, i965 drivers. | |||
2007-03-05 | fix for bug#9971 | Xiang, Haihao | |
call swsetup_Wakeup before falling back to software rendering | |||
2007-02-25 | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | |
2007-02-23 | Update DRI drivers for new glsl compiler. | Brian | |
Mostly: - update #includes - update STATE_* token code | |||
2007-02-12 | I965: fix a failure on waiting irq. | Xiang, Haihao | |
Wait until getting the right fence if drm/i915 resets the counter. | |||
2007-02-02 | Merge branch 'vbo-0.2' | Keith Whitwell | |
Conflicts: src/mesa/main/texcompress_s3tc.c src/mesa/tnl/t_array_api.c | |||
2007-02-02 | Modify assert to reflect rebase criteria | Keith Whitwell | |
2007-02-02 | Add Intel 965GM chipset info | Wang Zhenyu | |
2007-02-02 | Revert origin crestline pci id patch | Wang Zhenyu | |
2007-02-01 | Correct usage/meaning of max_index parameter. | Keith Whitwell | |
2007-02-01 | Cope with internally-generated null inputs. | Keith Whitwell | |
2007-01-30 | Use new rebase helper. Remove other rebase code. | Keith Whitwell | |
2007-01-26 | Bug #9604: Fix a static buffer allocation failure. | Eric Anholt | |
The pool that the static buffer got allocated from was sized by pitch * height, but the buffer generated from it had its size aligned to a tile boundary, so allocation failed if pitch * height wasn't aligned. However, the 2d driver ensures that the size ends at a tile boundary, so just pass the 2d driver's buffer size rather than calculating it. | |||
2007-01-26 | Add _mesa_ffsll() for compatibility on OSes without ffsll(), and use it. | Eric Anholt | |
2007-01-26 | Remove dead code causing a warning. | Eric Anholt | |
2007-01-26 | ARB_Occlusion_query should support multiple query at same time | Zou Nan hai | |
2007-01-24 | 965 glxswapcontrol fix | Zou Nan hai | |
2007-01-24 | 965 ARB_Occlusion_query fix | Zou Nan hai | |
2007-01-18 | 1. Fix bug #155 | Zou Nan hai | |
2. I notice multiple ARB_occlusion_query should be able to overlap according to spec. 3. Declaring extern variables in a .c file is evil, fix it. | |||
2007-01-17 | I965: fix bug#9625-get the correct PV for quardstrip | Xiang, Haihao | |
The order of vertices in payload for quardstrip is (0, 1, 3, 2), so the PV for quardstrip is c->reg.vertex[2]. |