Age | Commit message (Collapse) | Author |
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(cherry picked from commit 42e9bde0fa2276b8f5bb434328eea7665794b127)
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One warning message:
drm_i915_getparam: -22
was still being sent to fprintf(). This causes all Piglit tests to fail,
even with MESA_DEBUG=0.
Using _mesa_warning() to emit the message allows the general Mesa controls
for messages like this to be applied.
(cherry picked from commit bc3270e99f5c39544aaf831742db14796ab83a6a)
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This saves doing swtnl from uncached memory, which is painful. Improves
clutter test-text performance by 10% since it started using VBOs.
(cherry picked from commit a945e203d4fe254593bc0c5c5d6caca45e65f9f7)
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(cherry picked from commit 8ec6e036792decf5149a209e51cb5e93ccc5c754)
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Instead, stash the debug info under the handy debug flag.
Bug #20053
(cherry picked from commit 22690482e692cb5ed2f84d3e69545c09292e3484)
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The _Enabled field isn't updated at the point that DrawBuffers is called,
and the Driver.Enable() function does the testing for stencil buffer
presence anyway.
bug #21608 for Radeon
(cherry picked from commit 4c6f82989983eecc0b3b724716cb3bcb675664c5)
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(cherry picked from commit 64980125c76b05501a6fe7fe20fe52438f459129)
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This comes from a radeon-rewrite fallback fix, but may also fix stencil
clear failure when the polygon winding mode is flipped.
(cherry picked from commit d866abeffc7e4a29736fa35fb8ac09c3a28a44d6)
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(cherry picked from commit d4a42b0ce6455d03be70aa56aacd779be193aca4)
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This looks to be a win of a few percent in cairogears with new vbo code,
thanks to not polluting caches.
(cherry picked from commit aa422b262509bc0763a50f63a51a1730139ea52f)
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Fixes memory leak when destroying framebuffers.
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This prevents the width / height from being clipped to the window size before
the texture is allocated. This matches intelCopyTexImage1D.
This should fix bug #21227
Signed-off-by: Ian Romanick <ian.romanick@intel.com>
(cherry picked from commit 129f311673c99eb912d659023e50bc5f0ef53249)
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Fixes segfault in context tear-down when glClear was never called.
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gl_array_object encapsulates a set of vertex arrays (see the
GL_APPLE_vertex_array_object extension).
Create a private gl_array_object for drawing the quad for intel_clear_tris()
so we don't have to worry about the user's vertex array state.
This fixes the no-op glClear bug #21638 and removes the need to call
_mesa_PushClientAttrib() and _mesa_PopClientAttrib().
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For non-stereo visuals, which is all we support, we treat
GL_FRONT_LEFT as GL_FRONT. However, they are technically different,
and they have different enum values. Test for either one to determine
if we're in front-buffer rendering mode.
This fix was suggested by Pierre Willenbrock.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 2085cf24628be7cd297ab0f9ef5ce02bd5a006e2)
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This interface gives the driver two important features. First, it can
allocate the (fake) front-buffer only when needed. Second, it can
tell the buffer allocator the format of buffers being allocated. This
enables support for back-buffer and depth-buffer with different bits
per pixel.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@redhat.com>
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This is a CPU win in general, but in particular reduces the pain of
Mesa's calculation of min/max indices in DrawElements (wtf?).
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i915 actually supports up to 4 (according to header file - not tested),
i965 up to 16 (code already handled this but slightly broken), so don't use 2
for all chips, even though angular dependency is very high.
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Fixes gearsvbo app by Michael Clark.
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Fixes progs/glsl/skinning.c demo.
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Also enable them all regardless of screen bpp, as 32 bpp what I've been
testing against, and haven't been able to detect any screen bpp-specific
troubles with them.
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need to round up height for _mesa_copy_rect otherwise
textures with height smaller than 4 won't get copied to the miptree at all
Also fix up the confusing debug output (don't output unitialized values,
and output if data is present and the compressed flag)
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Triggered in test-fbo from clutter since
37fb2d9b23eab5dbbb43a212c3475cb8016837d8.
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It is possible for ctx->DrawBuffer to be NULL, so don't fault when
that happens. This change is not being committed to master because it
doesn't appear to be necessary there.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cherry picked from mesa_7_4_branch, commit 49e0c74ddd91900fc4effb6d305d56e0563b456d
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Fixes segfaults when rendering to front buffer.
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Handle the loader returning a fake front-buffer. Since the driver
never specifically requests a fake front-buffer, the driver assumes
that it will never receive both a fake and a real front-buffer.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@redhat.com>
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Track two flags: whether or not front-buffer rendering is currently
enabled and whether or not front-buffer rendering has been enabled
since the last glFlush. If the second flag is set, the front-buffer
is flushed via a loader call back. If the first flag is cleared, the
second flag is cleared at this time.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@redhat.com>
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This gets us the savings for driver-internal viewport calls that
dd1c68f15123a889a3ce9d2afe724e272d163e32 was attempting, without relying
on Xlib internals or clients handling X events.
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This speeds up OA on my GM45 by 21% (more than the original CPU cost of
the upload path). We might still be able to squeeze a few more percent out
by avoiding repeatedly mapping/unmapping buffers as we upload elements into
them.
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We don't upload the pixels with the CPU in that case, so the map will
only serve as a way of triggering cache flushes over a bunch of data we
don't touch.
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i965 can either do SRGBA8_REV format or SARGB8 format, but not SRGBA8.
Could add SRGBA8_REV support to mesa, but simply use SARGB8 for now.
While here, also add true srgb luminance / luminance_alpha support -
unfortunately the published docs fail to mention which asics support
this, tested on g43 so assume this works on any g4x.
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use color format constants instead of magic numbers
remove handling of cpp 0 or 3 (neither is possible) in various places
don't misconfigure 8 bit surface blits as rgb565
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This requires upgrading the interface so that the argument to
glXBindTexImageEXT isn't just dropped on the floor. Note that this only
fixes the accelerated path on Intel, as Mesa's texture format support is
missing x8r8g8b8 support (right now, GL_RGB textures get uploaded as a8r8gb8,
but in this case we're not doing the upload so we can't really work around it
that way).
Fixes bugs with compositors trying to use shaders that use alpha channels, on
windows without a valid alpha channel. Bug #19910 and likely others as well.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
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This was causing hangs in cairogears, as we would blit to the 8bpp target
(A8 texture) as 16bpp, and stomp over state objects.
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This can improve debugging with INTEL_DEBUG=batch,sync by giving smaller
batchbuffers.
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I keep wanting to hack this knob in as a one-time thing, so it seemed useful
to have all the time.
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