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path: root/src/mesa/drivers
AgeCommit message (Expand)Author
2009-03-07mesa: gl_register_file enum typedefBrian Paul
2009-03-07mesa: remove GL_MESA_program_debug extensionBrian Paul
2009-03-07mesa: remove last of _mesa_unreference_framebuffer() callsBrian Paul
2009-03-07r300: shut up valgrindMaciej Cencora
2009-03-06i965: check if we run out of GRF/temp registersBrian Paul
2009-03-06i965: bump up BRW_EU_MAX_INSNBrian Paul
2009-03-06i965: commentsBrian Paul
2009-03-06i965: comments and minor clean-upsBrian Paul
2009-03-06i965: avoid unnecessary calls to brw_wm_is_glsl()Brian Paul
2009-03-06r300: fix depth write regression (found by Nicolai Haehnle)Maciej Cencora
2009-03-06r300: enable EXT_fog_coord extensionMaciej Cencora
2009-03-06r300: route fog coord and W pos correctlyMaciej Cencora
2009-03-06r300: rewrite and hopefully simplify RS setupMaciej Cencora
2009-03-06r300: add few macros for RS setupMaciej Cencora
2009-03-06r300: silence valgrindMaciej Cencora
2009-03-06r300: Print reg address when debugging is enabledMaciej Cencora
2009-03-06r300: don't crash on sw tcl hw if point size vertex attrib is sentMaciej Cencora
2009-03-05intel: Fix bpp setting of blits to 8bpp targets.Eric Anholt
2009-03-05i965: fix 3DPRIMITIVE batch decode of the vertex count field.Eric Anholt
2009-03-05i965: Stop dumping programs after the first all-zeroes entry.Eric Anholt
2009-03-05intel: Add always_flush_batch driconf option for making small batchbuffers.Eric Anholt
2009-03-05intel: Add always_flush_cache driconf option for debugging cache flush failure.Eric Anholt
2009-03-05i965: Add a note about why the _NEW_STENCIL is required in draw_buffers.Eric Anholt
2009-03-05intel: Remove a gratuitous MI_FLUSH after clearing with a blit.Eric Anholt
2009-03-05i965: Remove dead flushing code.Eric Anholt
2009-03-05i965: comments and formatting fixesBrian Paul
2009-03-05i965: fix emit_math1() function used for scalar instructionsBrian Paul
2009-03-05i965: fix screen depth test in intel_validate_framebuffer)_Brian Paul
2009-03-05i965: init dest reg CondMask = COND_TR (the proper default)Brian Paul
2009-03-04i965: add software fallback for conformant 3D textures and GL_CLAMPRobert Ellison
2009-03-04mesa: call _mesa_get_cpu_string() to get CPU info for GL_RENDERER stringBrian Paul
2009-03-03xlib: code to force fixed function -> shader translation (for debug, disabled)Brian Paul
2009-03-02mesa: comments and code documenting a bug with depth 32 TrueColor drawing/rea...Brian Paul
2009-03-02mesa: use Stencil._Enabled field instead of Stencil.EnabledBrian Paul
2009-03-02mesa: remove unused AUX buffersBrian Paul
2009-02-28mesa: rename, reorder FRAG_RESULT_x tokensBrian Paul
2009-02-27intel: remove some unneeded buffer unmap callsBrian Paul
2009-02-27i915: Add support for a new G33-like chipset.Shaohua Li
2009-02-27i965: texture fixes: bordered textures, fallback renderingRobert Ellison
2009-02-26intel: no-op the intel_finish_render_texture() functionBrian Paul
2009-02-26intel: check texture formats in intel_validate_framebuffer()Brian Paul
2009-02-26intel: updated comment, some debug code (disabled)Brian Paul
2009-02-26i965: rename draw_regions -> color_regionsroot
2009-02-26i965: add missing init for region->widthBrian Paul
2009-02-26mesa: replace old prog_instruction::Sampler field with Aux fieldBrian Paul
2009-02-26i965: whitespace/indentation fixesBrian Paul
2009-02-26intel: Revert disable of accelerated Bitmap, which slipped in with spans stuff.Eric Anholt
2009-02-26i965: fix for RHW workaroundXiang, Haihao
2009-02-26intel: Disable creating DRI2 FBconfigs with depth size != color size.Eric Anholt
2009-02-26intel: Add span code for z24 without stencil.Eric Anholt
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