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2009-10-27intel: fix src offset bug in do_copy_texsubimage()Brian Paul
Use src->draw_offset intead of zero. Zero usually worked, except when the src renderbuffer is actually a texture mipmap level higher than zero. Fixes progs/test/blitfb.c test.
2009-10-27i915: Fix driver for the miptree x/y offset changes.Eric Anholt
Bug #24734.
2009-10-27i965: be clear that the Fallback field is a boolean, not a bitfieldBrian Paul
2009-10-27Revert "i965: fix hacked Fallback usage in brw_prepare_vertices()"Brian Paul
This reverts commit 8810b8f67135185d1044746bb861fe2ff997626c. It turns out the i965 driver uses the intel->Fallback field as a boolean, not as a bitmask. The intelFallback() function is a no-op in the i965 driver. It would have been nice if there were some comments about this. I'll fix that next...
2009-10-26intel: fix GL state bugs in intel_texture_bitmap()Brian Paul
Need to push texture state and polygon state too. Fixes rendering glitches seen in progs/demos/engine when changing the rendering mode (wireframe, texture modes). This makes bitmap rendering a little slower, unfortunately.
2009-10-25mesa: choose texture format in core mesa, not driversBrian Paul
Call the ctx->Driver.ChooseTextureFormat() function from core Mesa's _mesa_[Copy]TexImage functions instead of in the driver functions. One less thing for drivers to do.
2009-10-25mesa: remove calls to _mesa_compressed_row_stride()Brian Paul
2009-10-25glide: remove _mesa_compressed_row_stride() callsBrian Paul
And fix incorrect first parameter.
2009-10-24mesa: remove _mesa_compressed_texture_size()Brian Paul
Use _mesa_format_image_size() instead.
2009-10-24mesa: remove ctx->Driver.CompressedTextureSize() hookBrian Paul
It always just called _mesa_compressed_texture_size() anyway.
2009-10-24mesa: change compressed texture size callsBrian Paul
Replace calls to ctx->Driver.CompressedTextureSize with calls to _mesa_format_image_size. The former always called the later.
2009-10-23Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt
Conflicts: src/mesa/drivers/dri/intel/intel_fbo.c src/mesa/drivers/dri/intel/intel_mipmap_tree.c src/mesa/drivers/dri/intel/intel_mipmap_tree.h src/mesa/drivers/dri/intel/intel_tex_copy.c src/mesa/drivers/dri/intel/intel_tex_image.c
2009-10-23i965: Annotate _NEW_COLOR dependency for brw_update_renderbuffer_surface().Eric Anholt
2009-10-23intel: Keep track of x,y offsets in miptrees and use them for blitting.Eric Anholt
By just using offsets, we confused the hardware's tiling calculations, resulting in failures in miptree validation and blit clears. Fixes piglit fbo-clearmipmap. Bug #23552. (automatic mipmap generation)
2009-10-23mesa/dri: Remove extension_helper.h.Chia-I Wu
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2009-10-23mesa: Enable remap table in core.Chia-I Wu
This enables the remap table in core. driInitExtensions is adapted to use the remap table. All uses of extension_helper.h are replaced by remap_helper.h. The chicken-egg problem of the DRI drivers is also solved. It is now also possible to pass NULL extensions to driInitExtensions. It will cause driInitExtensions to map all known functions. This functionality is used by software drivers and EGL_i915. Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2009-10-23r600: remove duplicate stride settingAndre Maasikas
Stride is set already in r700SetVertexFormat and there it works correctly for 0 also
2009-10-23r600: for position invariant programs reading vert_pos is not always known ↵Andre Maasikas
at this point
2009-10-23r600: remove remains of old tnl pipelineAlex Deucher
2009-10-23r600: fix render size predictionAlex Deucher
2009-10-23r600: remove old tnl pipelineAlex Deucher
2009-10-23r600: clean up context creationAlex Deucher
Make it more consistent with other radeon drivers.
2009-10-22dri/drivers: update driNewRenderbuffer() to take a gl_formatBrian Paul
Now pass a specific MESA_FORMAT_x token to indicate the renderbuffer's format. This is better than passing a GLenum and having to guess the specific format. I'm unable to test all the drivers, but any issues should be easy to fix.
2009-10-22radeon: simplify radeon_create_renderbuffer()Brian Paul
2009-10-22Merge branch 'mesa_7_6_branch'Brian Paul
2009-10-22intel: flush old context before binding new contextBrian Paul
Per the GLX spec, when changing rendering contexts, the old context should first be flushed.
2009-10-22i965: fix hacked Fallback usage in brw_prepare_vertices()Brian Paul
Setting intel->Fallback = 1 clobbered any fallback state that was already set. Not sure where this hack originated (the git history is a little convoluted). Define and use a new BRW_FALLBACK_DRAW bit instead. This shouldn't break anything and could potentially fix some bugs (but no specific ones are known).
2009-10-22intel: define INTEL_FALLBACK_DRIVER for driversBrian Paul
2009-10-22intel: Fallback field is a bitmask, use GLbitfieldBrian Paul
2009-10-22i965: remove unused brw_context::tmp_fallback fieldBrian Paul
2009-10-22i965: remove unused BRW_FALLBACK_TEXTURE bitBrian Paul
The value was probably wrong too. It was the same as INTEL_FALLBACK_DRAW_BUFFER.
2009-10-22Kill off trident.Corbin Simpson
Hm. I could have said "chew trident and spit it out," or perhaps "spear trident," instead. Dohoho.
2009-10-22Nuke s3v.Corbin Simpson
As per FDO #17889.
2009-10-22r600: fix depth span macros for format changesAlex Deucher
2009-10-22radeon: fix some renderbuffer format bugsBrian Paul
2009-10-22Merge branch 'mesa_7_6_branch' of ↵Alex Deucher
git+ssh://agd5f@git.freedesktop.org/git/mesa/mesa
2009-10-22r600: set barrier for tex inst if dst is used earlier, might overwrite it ↵Andre Maasikas
otherwise
2009-10-22r600: need to export something from PSAndre Maasikas
Also avoids empty shader for "END" - seems to be somewhat valid fp Maybe this can be done differently in the future (fake FRAG_RESULT_COLOR already in Map_Fragment_Program() or is there a way to program the chip to not hang in case of no exports.
2009-10-22r600: add beginnings of ARL instructionAndre Maasikas
2009-10-21i915: replace MESA_FORMAT_Z24_S8 with MESA_FORMAT_S8_Z24Brian Paul
And change parameter type.
2009-10-21radeon: get rid of z24s8 <-> s8z24 conversions in span codeBrian Paul
Can just use s8z24 everywhere. Note: the WRITE_DEPTH macro for R600 may need to be fixed.
2009-10-21radeon: replace MESA_FORMAT_Z24_S8 with MESA_FORMAT_S8_Z24Brian Paul
Core Mesa deals with MESA_FORMAT_S8_Z24 everywhere it should so we shouldn't have to use MESA_FORMAT_Z24_S8 anymore.
2009-10-21intel: use MESA_FORMAT_S8_Z24 format and avoid z24s8/s8z24 conversionsBrian Paul
2009-10-21i965: change parameter type to gl_formatBrian Paul
2009-10-20intel: Fix flipped condition in ARB_sync GetSYnciv(GL_SYNC_STATUS).Eric Anholt
Bug #24435
2009-10-20meta: Fix the BufferSubData in meta clear to be BufferData.Eric Anholt
Fixes a 3.4% +/- 1.3% performance regression in my GL demo (n=3). The other meta code could probably also use the same treatment.
2009-10-19r300: fix texture size handling with size > 2048Mathias Fröhlich
The in kernel texture check fails because of both bit11 flags being set on 16x16 textures. It tuns out that these bits are still set and not cleared in the pp_txpitch field of the texture. The attached patch at least helps for this case on my machine. It clears the bit 11 from the pitch field if the texture is smaller and masks out that hight bits on the conventional width and height field. Fixes bug 24584
2009-10-19r600: Fix size calculation for 24 bit depthRobert Noland
size was being calculated based on 3 bytes per pixel with 24 bit depth instead of 4 bytes. This caused corruption in the bottom 25% of objects. This finishes fixing the menu/text corruption in compiz/kde4. Signed-off-by: Robert Noland <rnoland@2hip.net>
2009-10-19Merge branch 'mesa_7_6_branch' of ↵Alex Deucher
git+ssh://agd5f@git.freedesktop.org/git/mesa/mesa regenerated lex.yy.c
2009-10-17intel: Disallow relocations to the byte beyond the end of the bufferChris Wilson
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