| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2008-01-03 | fix fd.o bug #13761 | Zou Nan hai | |
| MRD computation is now changed in mesa core | |||
| 2008-01-02 | [965] Convert WM unit to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert VS unit to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert SF unit to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert GS unit to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert clip unit to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert CC unit to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert surface state to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | [965] Convert sampler state to use a cache key instead of brw_cache_data. | Eric Anholt | |
| 2008-01-02 | Revert "[intel] Use the memory type mask containing the caching flags." | Eric Anholt | |
| This reverts commit 8bb9ae3693362a302206255c61f512d942df9bbf. Validating our kernel buffers with the caching off in flags but on in mask means that the kernel migrates the buffer to be uncached, which is undesired. | |||
| 2008-01-02 | [intel] Use the memory type mask containing the caching flags. | Eric Anholt | |
| 2008-01-02 | Set correct flags mask when validating buffers. | Keith Packard | |
| The 'mask' value used in the validation operation specifies which of the 'flags' bits are being modified. Buffer validation wants to pass the memory type and access mode (rwx) to the kernel so that the buffer will be placed correctly, and so that the right kind of fence will be created (read vs write). That means we actually want a constant mask for these operations, and not something computed from the bits coming in. The constant we want is DRM_BO_MASK_MEM | DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_EXE. | |||
| 2008-01-02 | [965] Improve performance by including reloc target buffer pointers in keys. | Eric Anholt | |
| Without this, the WM binding tables would all collide, for example. Improves openarena performance by around 2%. | |||
| 2008-01-02 | additional stub functions | Brian | |
| 2008-01-02 | additional GL_COLOR_ATTACHMENTx_EXT cases (bug 13767) | Brian | |
| 2008-01-02 | i915: Needn't adjust pixel centers. fix #12944 | Xiang, Haihao | |
| 2008-01-02 | Revert "r300: fix bug with maniadrive rendering" | Dave Airlie | |
| this is correct, there is another issue with sw fallbacks This reverts commit cc50edbca2fd3111f9987d4117fa6656599d79dc. | |||
| 2008-01-01 | remove unneeded conditional | Brian | |
| 2008-01-01 | fix vbo display list memleak upon context destruction | Brian | |
| 2008-01-01 | additional GL_COLOR_ATTACHMENTx_EXT cases (bug 13767) | Brian | |
| 2008-01-01 | Convert to 0/1 when setting boolean uniforms | Bruce Merry | |
| Also add some extra tests to the shader_api regression tests | |||
| 2008-01-01 | Make use of count in _mesa_uniform_matrix | Bruce Merry | |
| 2008-01-01 | More fixes to shader_api | Bruce Merry | |
| - return GL_INVALID_OPERATION instead of GL_INVALID_VALUE if location is bad - correct the type-checking of uniforms from my previous commit - accept location of -1 in _mesa_uniform_matrix | |||
| 2008-01-01 | Fix several bugs relating to uniforms and attributes in GLSL API | Bruce Merry | |
| - fix sizes for GL_FLOAT_MAT2x3 and GL_FLOAT_MAT4x3 in sizeof_glsl_type - fix size returns in _mesa_get_active_attrib - fix out-of-bounds array access to vec_types in _mesa_get_active_attrib - fix queries of matrix uniforms in _mesa_get_uniformfv - fix _mesa_get_uniformfv to only return one base, even from an array - allow location == -1 in _mesa_uniform - validate types in _mesa_uniform - allow array overruns in _mesa_uniform | |||
| 2008-01-01 | added 'get' info for framebuffer object tokens | Brian | |
| 2008-01-01 | add 'Get' info for MAX_3D_TEXTURE_SIZE (for bug 13811) | Brian | |
| 2008-01-02 | t_vp_build: fix temporary register allocation to minimise the allocations | Hans de Goede | |
| 2008-01-02 | rx00: fix off by one error in tempreg check | Hans de Goede | |
| 2008-01-02 | r300: fix bug with maniadrive rendering | Dave Airlie | |
| I've no idea why I added this so I'll have to spend time tracking it down | |||
| 2007-12-29 | fix fd.o bug #13847 | Zou Nan hai | |
| 2007-12-28 | Bug #13839: Fix 3D texture offset miscalculation with pixels versus bytes. | Roland Scheidegger | |
| 2007-12-27 | i915: reset swrast state after calling swrast DrawPixels. | Xiang, Haihao | |
| In order to optimize DrawPixels, the i915 texenv program isn't applied to swrast DrawPixels in the i915 driver. This causes this program isn't applied to any following swrast functions. Resetting the swrast state fixes this issue. Fix #13614 | |||
| 2007-12-25 | i915: apply commit a0a5e8cfc04c14873441b50f7d594ef11806b9a8 from 965. | Xiang, Haihao | |
| fix #11925 | |||
| 2007-12-25 | mesa: fix a bad cast in put_values_z24. | Xiang, Haihao | |
| The values passed to put_values_z24 are GLuint, not GLubyte. fix #13543 | |||
| 2007-12-24 | __driConfigOptions must be PUBLIC. | Adam Jackson | |
| 2007-12-24 | R300: RV410 SE chips have half the pipes of regular RV410 | Alex Deucher | |
| This fixes 3D rendering on x700 SE chips. Reported by Kano. | |||
| 2007-12-22 | fix GL_LINE_LOOP with drivers using own render pipeline stage (#12410, #13527) | Roland Scheidegger | |
| primitive needs to include the begin/end flags (broken since vbo-0.2). Should fix missing first/last line segment on gamma, i810, i915, mga, r200, radeon, s3v, savage, unichrome (r300 already correct). Tested on r200, fixes #13527. | |||
| 2007-12-21 | Silence compiler warnings from XML error macros. | Kristian Høgsberg | |
| 2007-12-21 | [965] Fix and enable separate stencil. | Eric Anholt | |
| Note that this does not enable GL_EXT_stencil_two_side, because Mesa's computed _TestTwoSide ends up respecting only STENCIL_TEST_TWO_SIDE_EXT (defaults to GL_FALSE), even if the application uses only GL 2.0 / ATI entrypoints. | |||
| 2007-12-21 | [intel] Move some pixel path support from drivers to shared. | Eric Anholt | |
| 2007-12-21 | intel: cast a pointer to unsigned long, avoid potential error. | Xiang, Haihao | |
| 2007-12-20 | [965] Enable EXT_framebuffer_object. | Eric Anholt | |
| To do so, merge the remainnig necessary code from the buffers, blit, span, and screen code to shared, and replace it with those. | |||
| 2007-12-20 | [965] Actually enable SGIS_generate_mipmap. | Eric Anholt | |
| 2007-12-20 | [intel] Fix and reenable (software) SGIS_generate_mipmap | Eric Anholt | |
| The core problem was that _mesa_generate_mipmap was not respecting RowStride of the source image. Additionally, the intel private data associated with the images (level and face) was not being initialized for the _mesa_generate_mipmap-generated images. | |||
| 2007-12-20 | [intel] Allow driver hooks to be NULL in intel_buffers.c and just update flags. | Eric Anholt | |
| The 965 driver relies on flag checking instead of these hooks, and will be using this code soon. | |||
| 2007-12-20 | [i915] Move meta_draw_quad into the vtbl with other meta operations. | Eric Anholt | |
| 2007-12-20 | return correct size from glGetActiveUniform (bug 13751) | Brian | |
| 2007-12-20 | i915: avoid dead lock in intel_meta_draw_poly. fix #13696 | Xiang, Haihao | |
| 2007-12-18 | [915] Set cliprects in the drawbuffer software fallback case as well. | Eric Anholt | |
| Otherwise, we may violate cliprect asssertions on clearing the buffers, which isn't affected by the fallback. | |||
| 2007-12-19 | i965: allocate GRF registers before building subroutines, | Xiang, Haihao | |
| it ensures there are sufficient registers for all subroutines. | |||
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index : Mesa | |
| My Mesa repository | Thomas White |
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