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authorLinus Torvalds <torvalds@linux-foundation.org>2009-05-02 16:40:20 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-05-02 16:40:20 -0700
commit2142babac999a5ba169348892a8e3ac222bec7a4 (patch)
treeeb862396a9864b34e2335b7cc0c6114c56f9ec1a /arch/arm/plat-omap/gpio.c
parentbb402c4fb5bba4edf5b8c72b3db8760e60df4876 (diff)
parent0516e4643cd22fc9f535aef02ad1de66c382c93b (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits) [ARM] 5489/1: ARM errata: Data written to the L2 cache can be overwritten with stale data [ARM] 5490/1: ARM errata: Processor deadlock when a false hazard is created [ARM] 5487/1: ARM errata: Stale prediction on replaced interworking branch [ARM] 5488/1: ARM errata: Invalidation of the Instruction Cache operation can fail davinci: DM644x: NAND: update partitioning davinci: update DM644x support in preparation for more SoCs davinci: DM644x: rename board file davinci: update pin-multiplexing support davinci: serial: generalize for more SoCs davinci: DM355 IRQ Definitions davinci: DM646x: add interrupt number and priorities davinci: PSC: Clear bits in MDCTL reg before setting new bits davinci: gpio bugfixes davinci: add EDMA driver davinci: timers: use clk_get_rate() [ARM] pxa/littleton: add missing da9034 touchscreen support [ARM] pxa/zylonite: configure GPIO18/19 correctly, used by 2 GPIO expanders [ARM] pxa/zylonite: fix the issue of unused SDATA_IN_1 pin get AC97 not working [ARM] pxa: make ads7846 on corgi and spitz to sync on HSYNC [ARM] pxa: remove unused CPU_FREQ_PXA Kconfig symbol ...
Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r--arch/arm/plat-omap/gpio.c20
1 files changed, 9 insertions, 11 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index d3fa41e3d8c..17d7afe42b8 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -758,8 +758,12 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
/* Workaround for clearing DSP GPIO interrupts to allow retention */
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+ reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;
if (cpu_is_omap24xx() || cpu_is_omap34xx())
- __raw_writel(gpio_mask, bank->base + OMAP24XX_GPIO_IRQSTATUS2);
+ __raw_writel(gpio_mask, reg);
+
+ /* Flush posted write for the irq status to avoid spurious interrupts */
+ __raw_readl(reg);
#endif
}
@@ -921,13 +925,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
case METHOD_MPUIO:
case METHOD_GPIO_1610:
spin_lock_irqsave(&bank->lock, flags);
- if (enable) {
+ if (enable)
bank->suspend_wakeup |= (1 << gpio);
- enable_irq_wake(bank->irq);
- } else {
- disable_irq_wake(bank->irq);
+ else
bank->suspend_wakeup &= ~(1 << gpio);
- }
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
#endif
@@ -940,13 +941,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
return -EINVAL;
}
spin_lock_irqsave(&bank->lock, flags);
- if (enable) {
+ if (enable)
bank->suspend_wakeup |= (1 << gpio);
- enable_irq_wake(bank->irq);
- } else {
- disable_irq_wake(bank->irq);
+ else
bank->suspend_wakeup &= ~(1 << gpio);
- }
spin_unlock_irqrestore(&bank->lock, flags);
return 0;
#endif