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| author | David Woodhouse <dwmw2@shinybook.infradead.org> | 2005-08-09 16:51:35 +0100 |
|---|---|---|
| committer | David Woodhouse <dwmw2@shinybook.infradead.org> | 2005-08-09 16:51:35 +0100 |
| commit | c973b112c76c9d8fd042991128f218a738cc8d0a (patch) | |
| tree | e813b0da5d0a0e19e06de6462d145a29ad683026 /include/asm-cris/arch-v32/tlb.h | |
| parent | c5fbc3966f48279dbebfde10248c977014aa9988 (diff) | |
| parent | 00dd1e433967872f3997a45d5adf35056fdf2f56 (diff) | |
Merge with /shiny/git/linux-2.6/.git
Diffstat (limited to 'include/asm-cris/arch-v32/tlb.h')
| -rw-r--r-- | include/asm-cris/arch-v32/tlb.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/asm-cris/arch-v32/tlb.h b/include/asm-cris/arch-v32/tlb.h new file mode 100644 index 00000000000..4effb125366 --- /dev/null +++ b/include/asm-cris/arch-v32/tlb.h @@ -0,0 +1,14 @@ +#ifndef _CRIS_ARCH_TLB_H +#define _CRIS_ARCH_TLB_H + +/* + * The TLB is a 64-entry cache. Each entry has a 8-bit page_id that is used + * to store the "process" it belongs to (=> fast mm context switch). The + * last page_id is never used so we can make TLB entries that never matches. + */ +#define NUM_TLB_ENTRIES 64 +#define NUM_PAGEID 256 +#define INVALID_PAGEID 255 +#define NO_CONTEXT -1 + +#endif /* _CRIS_ARCH_TLB_H */ |