diff options
| author | Michal Krol <michal@vmware.com> | 2009-12-12 16:48:32 +0100 |
|---|---|---|
| committer | Michal Krol <michal@vmware.com> | 2009-12-12 16:48:32 +0100 |
| commit | a3eb0f718e19653a2ad8e49396c904183be456f3 (patch) | |
| tree | 0092574c469ea586a6cab8b8ebb7ac62b8221a2a /src/gallium/winsys/drm/intel/gem/intel_drm_batchbuffer.c | |
| parent | 491f384c3958067e6c4c994041f5d8d413b806bc (diff) | |
| parent | 784cca9fa527de771754d76545970f78094b9adf (diff) | |
Merge branch 'master' into glsl-pp-rework-2
Conflicts:
progs/perf/drawoverhead.c
progs/perf/teximage.c
progs/perf/vbo.c
progs/perf/vertexrate.c
src/mesa/shader/slang/library/slang_common_builtin_gc.h
Diffstat (limited to 'src/gallium/winsys/drm/intel/gem/intel_drm_batchbuffer.c')
| -rw-r--r-- | src/gallium/winsys/drm/intel/gem/intel_drm_batchbuffer.c | 41 |
1 files changed, 28 insertions, 13 deletions
diff --git a/src/gallium/winsys/drm/intel/gem/intel_drm_batchbuffer.c b/src/gallium/winsys/drm/intel/gem/intel_drm_batchbuffer.c index ebd1b607b7..5b4dafc8e4 100644 --- a/src/gallium/winsys/drm/intel/gem/intel_drm_batchbuffer.c +++ b/src/gallium/winsys/drm/intel/gem/intel_drm_batchbuffer.c @@ -14,6 +14,8 @@ #undef INTEL_RUN_SYNC #undef INTEL_MAP_BATCHBUFFER +#undef INTEL_MAP_GTT +#define INTEL_ALWAYS_FLUSH struct intel_drm_batchbuffer { @@ -34,6 +36,7 @@ static void intel_drm_batchbuffer_reset(struct intel_drm_batchbuffer *batch) { struct intel_drm_winsys *idws = intel_drm_winsys(batch->base.iws); + int ret; if (batch->bo) drm_intel_bo_unreference(batch->bo); @@ -43,8 +46,15 @@ intel_drm_batchbuffer_reset(struct intel_drm_batchbuffer *batch) 4096); #ifdef INTEL_MAP_BATCHBUFFER - drm_intel_bo_map(batch->bo, TRUE); +#ifdef INTEL_MAP_GTT + ret = drm_intel_gem_bo_map_gtt(batch->bo); +#else + ret = drm_intel_bo_map(batch->bo, TRUE); +#endif + assert(ret == 0); batch->base.map = batch->bo->virtual; +#else + (void)ret; #endif memset(batch->base.map, 0, batch->actual_size); @@ -148,24 +158,29 @@ intel_drm_batchbuffer_flush(struct intel_batchbuffer *ibatch, used = batch->base.ptr - batch->base.map; assert((used & 3) == 0); - if (used & 4) { - // MI_FLUSH | FLUSH_MAP_CACHE; - intel_batchbuffer_dword(ibatch, (0x0<<29)|(0x4<<23)|(1<<0)); - // MI_NOOP - intel_batchbuffer_dword(ibatch, (0x0<<29)|(0x0<<23)); - // MI_BATCH_BUFFER_END; - intel_batchbuffer_dword(ibatch, (0x0<<29)|(0xA<<23)); - } else { - //MI_FLUSH | FLUSH_MAP_CACHE; - intel_batchbuffer_dword(ibatch, (0x0<<29)|(0x4<<23)|(1<<0)); - // MI_BATCH_BUFFER_END; - intel_batchbuffer_dword(ibatch, (0x0<<29)|(0xA<<23)); + +#ifdef INTEL_ALWAYS_FLUSH + /* MI_FLUSH | FLUSH_MAP_CACHE */ + intel_batchbuffer_dword(ibatch, (0x4<<23)|(1<<0)); + used += 4; +#endif + + if ((used & 4) == 0) { + /* MI_NOOP */ + intel_batchbuffer_dword(ibatch, 0); } + /* MI_BATCH_BUFFER_END */ + intel_batchbuffer_dword(ibatch, (0xA<<23)); used = batch->base.ptr - batch->base.map; + assert((used & 4) == 0); #ifdef INTEL_MAP_BATCHBUFFER +#ifdef INTEL_MAP_GTT + drm_intel_gem_bo_unmap_gtt(batch->bo); +#else drm_intel_bo_unmap(batch->bo); +#endif #else drm_intel_bo_subdata(batch->bo, 0, used, batch->base.map); #endif |