Merge branch 'master' of git+ssh://joukj@git.freedesktop.org/git/mesa/mesa

22 files changed, 1105 insertions, 2313 deletions

diff --git a/src/mesa/drivers/dri/i915/Makefile b/src/mesa/drivers/dri/i915/Makefile
index 38e4090211..ae96ddda0a 100644
--- a/src/mesa/drivers/dri/i915/Makefile
+++ b/src/mesa/drivers/dri/i915/Makefile
@@ -52,7 +52,8 @@ DRIVER_SOURCES = \
 	intel_state.c \
 	intel_tris.c \
 	intel_fbo.c \
-	intel_depthstencil.c
+	intel_depthstencil.c \
+	intel_bufmgr_ttm.c
 
 C_SOURCES = \
 	$(COMMON_SOURCES) \
@@ -61,7 +62,8 @@ C_SOURCES = \
 
 ASM_SOURCES = 
 
-DRIVER_DEFINES = -I../intel $(shell pkg-config libdrm --atleast-version=2.3.1 \
+DRIVER_DEFINES = -I../intel -I../intel/server \
+	$(shell pkg-config libdrm --atleast-version=2.3.1 \
 				&& echo "-DDRM_VBLANK_FLIP=DRM_VBLANK_FLIP")
 
 include ../Makefile.template
diff --git a/src/mesa/drivers/dri/i915/i915_debug.c b/src/mesa/drivers/dri/i915/i915_debug.c
index c0e1242a0e..8eb1c5b49e 100644
--- a/src/mesa/drivers/dri/i915/i915_debug.c
+++ b/src/mesa/drivers/dri/i915/i915_debug.c
@@ -376,20 +376,25 @@ static void BR13( struct debug_stream *stream,
 }
 
 
-static void BR22( struct debug_stream *stream,
-		  GLuint val )
+static void BR2223( struct debug_stream *stream,
+		    GLuint val22, GLuint val23 )
 {
-   PRINTF("\t0x%08x\n",  val);
-   BITS(val, 31, 16, "dest y1");
-   BITS(val, 15, 0,  "dest x1");
-}
+   union { GLuint val; short field[2]; } BR22, BR23;
 
-static void BR23( struct debug_stream *stream,
-		  GLuint val )
-{
-   PRINTF("\t0x%08x\n",  val);
-   BITS(val, 31, 16, "dest y2");
-   BITS(val, 15, 0,  "dest x2");
+   BR22.val = val22;
+   BR23.val = val23;
+
+   PRINTF("\t0x%08x\n",  val22);
+   BITS(val22, 31, 16, "dest y1");
+   BITS(val22, 15, 0,  "dest x1");
+
+   PRINTF("\t0x%08x\n",  val23);
+   BITS(val23, 31, 16, "dest y2");
+   BITS(val23, 15, 0,  "dest x2");
+
+   /* The blit engine may produce unexpected results when these aren't met */
+   assert(BR22.field[0] < BR23.field[0]);
+   assert(BR22.field[1] < BR23.field[1]);
 }
 
 static void BR09( struct debug_stream *stream,
@@ -436,8 +441,8 @@ static GLboolean debug_copy_blit( struct debug_stream *stream,
    PRINTF("\t0x%08x\n",  ptr[j++]);
    
    BR13(stream, ptr[j++]);
-   BR22(stream, ptr[j++]);
-   BR23(stream, ptr[j++]);
+   BR2223(stream, ptr[j], ptr[j+1]);
+   j += 2;
    BR09(stream, ptr[j++]);
    BR26(stream, ptr[j++]);
    BR11(stream, ptr[j++]);
@@ -459,8 +464,8 @@ static GLboolean debug_color_blit( struct debug_stream *stream,
    PRINTF("\t0x%08x\n",  ptr[j++]);
 
    BR13(stream, ptr[j++]);
-   BR22(stream, ptr[j++]);
-   BR23(stream, ptr[j++]);
+   BR2223(stream, ptr[j], ptr[j+1]);
+   j += 2;
    BR09(stream, ptr[j++]);
    BR16(stream, ptr[j++]);
 
diff --git a/src/mesa/drivers/dri/i915/i915_reg.h b/src/mesa/drivers/dri/i915/i915_reg.h
index a9fa56e8a6..b5585e70e7 100644
--- a/src/mesa/drivers/dri/i915/i915_reg.h
+++ b/src/mesa/drivers/dri/i915/i915_reg.h
@@ -34,8 +34,6 @@
 
 #define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
 
-#define CMD_3D (0x3<<29)
-
 #define PRIM3D_INLINE		(CMD_3D | (0x1f<<24))
 #define PRIM3D_TRILIST		(0x0<<18)
 #define PRIM3D_TRISTRIP 	(0x1<<18)
diff --git a/src/mesa/drivers/dri/i915/intel_batchbuffer.c b/src/mesa/drivers/dri/i915/intel_batchbuffer.c
index 045ff0a5b0..74c75a3769 100644
--- a/src/mesa/drivers/dri/i915/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i915/intel_batchbuffer.c
@@ -28,7 +28,7 @@
 #include "intel_batchbuffer.h"
 #include "intel_ioctl.h"
 #include "intel_decode.h"
-#include "i915_debug.h"
+#include "intel_reg.h"
 
 /* Relocations in kernel space:
  *    - pass dma buffer seperately
@@ -116,85 +116,23 @@ intel_batchbuffer_free(struct intel_batchbuffer *batch)
    free(batch);
 }
 
-static int
-relocation_sort(const void *a_in, const void *b_in) {
-   const struct buffer_reloc *a = a_in, *b = b_in;
-
-   return (intptr_t)a->buf < (intptr_t)b->buf ? -1 : 1;
-}
 
 
 /* TODO: Push this whole function into bufmgr.
  */
 static void
 do_flush_locked(struct intel_batchbuffer *batch,
-                GLuint used,
-                GLboolean ignore_cliprects, GLboolean allow_unlock)
+		GLuint used,
+		GLboolean ignore_cliprects, GLboolean allow_unlock)
 {
-   GLuint *ptr;
-   GLuint i;
    struct intel_context *intel = batch->intel;
-   dri_fence *fo;
-   GLboolean performed_rendering = GL_FALSE;
-
-   assert(batch->buf->virtual != NULL);
-   ptr = batch->buf->virtual;
-
-   /* Sort our relocation list in terms of referenced buffer pointer.
-    * This lets us uniquely validate the buffers with the sum of all the flags,
-    * while avoiding O(n^2) on number of relocations.
-    */
-   qsort(batch->reloc, batch->nr_relocs, sizeof(batch->reloc[0]),
-	 relocation_sort);
-
-   /* Perform the necessary validations of buffers, and enter the relocations
-    * in the batchbuffer.
-    */
-   for (i = 0; i < batch->nr_relocs; i++) {
-      struct buffer_reloc *r = &batch->reloc[i];
-
-      if (r->validate_flags & DRM_BO_FLAG_WRITE)
-	 performed_rendering = GL_TRUE;
+   void *start;
+   GLuint count;
 
-      /* If this is the first time we've seen this buffer in the relocation
-       * list, figure out our flags and validate it.
-       */
-      if (i == 0 || batch->reloc[i - 1].buf != r->buf) {
-	 uint32_t validate_flags;
-	 int j, ret;
+   start = dri_process_relocs(batch->buf, &count);
 
-	 /* Accumulate the flags we need for validating this buffer. */
-	 validate_flags = r->validate_flags;
-	 for (j = i + 1; j < batch->nr_relocs; j++) {
-	    if (batch->reloc[j].buf != r->buf)
-	       break;
-	    validate_flags |= batch->reloc[j].validate_flags;
-	 }
-
-	 /* Validate.  If we fail, fence to clear the unfenced list and bail
-	  * out.
-	  */
-	 ret = dri_bo_validate(r->buf, validate_flags);
-	 if (ret != 0) {
-	    dri_bo_unmap(batch->buf);
-	    fo = dri_fence_validated(intel->intelScreen->bufmgr,
-				     "batchbuffer failure fence", GL_TRUE);
-	    dri_fence_unreference(fo);
-	    goto done;
-	 }
-      }
-      ptr[r->offset / 4] = r->buf->offset + r->delta;
-      dri_bo_unreference(r->buf);
-   }
-
-   dri_bo_unmap(batch->buf);
    batch->map = NULL;
    batch->ptr = NULL;
-
-   dri_bo_validate(batch->buf, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_EXE);
-
-   batch->list_count = 0;
-   batch->nr_relocs = 0;
    batch->flags = 0;
 
    /* Throw away non-effective packets.  Won't work once we have
@@ -203,26 +141,18 @@ do_flush_locked(struct intel_batchbuffer *batch,
     */
 
    if (!(intel->numClipRects == 0 && !ignore_cliprects)) {
-      intel_batch_ioctl(batch->intel,
-                        batch->buf->offset,
-                        used, ignore_cliprects, allow_unlock);
-   }
-
-   /* Associate a fence with the validated buffers, and note that we included
-    * a flush at the end.
-    */
-   fo = dri_fence_validated(intel->intelScreen->bufmgr,
-			    "Batch fence", GL_TRUE);
-
-   if (performed_rendering) {
-      dri_fence_unreference(batch->last_fence);
-      batch->last_fence = fo;
-   } else {
-     /* If we didn't validate any buffers for writing by the card, we don't
-      * need to track the fence for glFinish().
-      */
-      dri_fence_unreference(fo);
+      if (intel->intelScreen->ttm == GL_TRUE) {
+	 intel_exec_ioctl(batch->intel,
+			  used, ignore_cliprects, allow_unlock,
+			  start, count, &batch->last_fence);
+      } else {
+	 intel_batch_ioctl(batch->intel,
+			   batch->buf->offset,
+			   used, ignore_cliprects, allow_unlock);
+      }
    }
+      
+   dri_post_submit(batch->buf, &batch->last_fence);
 
    if (intel->numClipRects == 0 && !ignore_cliprects) {
       if (allow_unlock) {
@@ -237,16 +167,14 @@ do_flush_locked(struct intel_batchbuffer *batch,
       intel->vtbl.lost_hardware(intel);
    }
 
-done:
    if (INTEL_DEBUG & DEBUG_BATCH) {
-      dri_bo_map(batch->buf, GL_FALSE);
-      intel_decode(ptr, used / 4, batch->buf->offset,
-		   intel->intelScreen->deviceID);
-      dri_bo_unmap(batch->buf);
+      //      dri_bo_map(batch->buf, GL_FALSE);
+      //      intel_decode(ptr, used / 4, batch->buf->offset,
+      //		   intel->intelScreen->deviceID);
+      //      dri_bo_unmap(batch->buf);
    }
 }
 
-
 void
 intel_batchbuffer_flush(struct intel_batchbuffer *batch)
 {
@@ -280,7 +208,7 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch)
 
    do_flush_locked(batch, used, !(batch->flags & INTEL_BATCH_CLIPRECTS),
 		   GL_FALSE);
-
+     
    if (!was_locked)
       UNLOCK_HARDWARE(intel);
 
@@ -305,22 +233,12 @@ intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
                              dri_bo *buffer,
                              GLuint flags, GLuint delta)
 {
-   struct buffer_reloc *r = &batch->reloc[batch->nr_relocs++];
-
-   assert(batch->nr_relocs <= MAX_RELOCS);
-
-   dri_bo_reference(buffer);
-   r->buf = buffer;
-   r->offset = batch->ptr - batch->map;
-   r->delta = delta;
-   r->validate_flags = flags;
-
+   dri_emit_reloc(batch->buf, flags, delta, batch->ptr - batch->map, buffer);
    batch->ptr += 4;
+
    return GL_TRUE;
 }
 
-
-
 void
 intel_batchbuffer_data(struct intel_batchbuffer *batch,
                        const void *data, GLuint bytes, GLuint flags)
diff --git a/src/mesa/drivers/dri/i915/intel_batchbuffer.h b/src/mesa/drivers/dri/i915/intel_batchbuffer.h
index 850a91e1c9..b5c7a783a7 100644
--- a/src/mesa/drivers/dri/i915/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/i915/intel_batchbuffer.h
@@ -2,6 +2,7 @@
 #define INTEL_BATCHBUFFER_H
 
 #include "mtypes.h"
+
 #include "dri_bufmgr.h"
 
 struct intel_context;
@@ -9,19 +10,9 @@ struct intel_context;
 #define BATCH_SZ 16384
 #define BATCH_RESERVED 16
 
-#define MAX_RELOCS 4096
-
 #define INTEL_BATCH_NO_CLIPRECTS 0x1
 #define INTEL_BATCH_CLIPRECTS    0x2
 
-struct buffer_reloc
-{
-   dri_bo *buf;
-   GLuint offset;
-   GLuint delta;                /* not needed? */
-   GLuint validate_flags;
-};
-
 struct intel_batchbuffer
 {
    struct intel_context *intel;
@@ -30,13 +21,9 @@ struct intel_batchbuffer
    dri_fence *last_fence;
    GLuint flags;
 
-   drmBOList list;
-   GLuint list_count;
    GLubyte *map;
    GLubyte *ptr;
 
-   struct buffer_reloc reloc[MAX_RELOCS];
-   GLuint nr_relocs;
    GLuint size;
 };
 
diff --git a/src/mesa/drivers/dri/i915/intel_blit.c b/src/mesa/drivers/dri/i915/intel_blit.c
index 5d97f08434..2761136f47 100644
--- a/src/mesa/drivers/dri/i915/intel_blit.c
+++ b/src/mesa/drivers/dri/i915/intel_blit.c
@@ -40,7 +40,6 @@
 #include "intel_fbo.h"
 #include "intel_reg.h"
 #include "intel_regions.h"
-#include "vblank.h"
 
 #define FILE_DEBUG_FLAG DEBUG_BLIT
 
@@ -105,8 +104,7 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
       }
       else {
 	 BR13 = (pitch * cpp) | (0xCC << 16) | (1 << 24) | (1 << 25);
-	 CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
-		XY_SRC_COPY_BLT_WRITE_RGB);
+	 CMD = (XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB);
       }
 
       for (i = 0; i < nbox; i++, pbox++) {
@@ -184,8 +182,7 @@ intelEmitFillBlit(struct intel_context *intel,
       break;
    case 4:
       BR13 = dst_pitch | (0xF0 << 16) | (1 << 24) | (1 << 25);
-      CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA |
-             XY_COLOR_BLT_WRITE_RGB);
+      CMD = (XY_COLOR_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB);
       break;
    default:
       return;
@@ -273,8 +270,7 @@ intelEmitCopyBlit(struct intel_context *intel,
          (((GLint) dst_pitch) & 0xffff) | 
 	 (translate_raster_op(logic_op) << 16) | (1 << 24) | (1 << 25);
       CMD =
-         (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
-          XY_SRC_COPY_BLT_WRITE_RGB);
+         (XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB);
       break;
    default:
       return;
@@ -405,6 +401,9 @@ intelClearWithBlit(GLcontext * ctx, GLbitfield mask)
             b = *box;
          }
 
+         if (b.x1 >= b.x2 || b.y1 >= b.y2)
+            continue;
+
          if (0)
             _mesa_printf("clear %d,%d..%d,%d, mask %x\n",
                          b.x1, b.y1, b.x2, b.y2, mask);
@@ -443,15 +442,14 @@ intelClearWithBlit(GLcontext * ctx, GLbitfield mask)
                   if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
                      CMD = XY_COLOR_BLT_CMD;
                      if (clearMask & BUFFER_BIT_DEPTH)
-                        CMD |= XY_COLOR_BLT_WRITE_RGB;
+                        CMD |= XY_BLT_WRITE_RGB;
                      if (clearMask & BUFFER_BIT_STENCIL)
-                        CMD |= XY_COLOR_BLT_WRITE_ALPHA;
+                        CMD |= XY_BLT_WRITE_ALPHA;
                   }
                   else {
                      /* clearing RGBA */
-                     CMD = (XY_COLOR_BLT_CMD |
-                            XY_COLOR_BLT_WRITE_ALPHA |
-                            XY_COLOR_BLT_WRITE_RGB);
+                     CMD = XY_COLOR_BLT_CMD |
+			XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
                   }
                }
                else {
diff --git a/src/mesa/drivers/dri/i915/intel_buffers.c b/src/mesa/drivers/dri/i915/intel_buffers.c
index 938bed6da7..1ae8b5feb4 100644
--- a/src/mesa/drivers/dri/i915/intel_buffers.c
+++ b/src/mesa/drivers/dri/i915/intel_buffers.c
@@ -45,7 +45,7 @@
 
 /* This block can be removed when libdrm >= 2.3.1 is required */
 
-#ifndef DRM_VBLANK_FLIP
+#ifndef DRM_IOCTL_I915_FLIP
 
 #define DRM_VBLANK_FLIP 0x8000000
 
@@ -231,7 +231,7 @@ intelWindowMoved(struct intel_context *intel)
       }
    }
 
-   if (intel->intelScreen->driScrnPriv->ddxMinor >= 7) {
+   if (intel->intelScreen->driScrnPriv->ddx_version.minor >= 7) {
       drmI830Sarea *sarea = intel->sarea;
       drm_clip_rect_t drw_rect = { .x1 = dPriv->x, .x2 = dPriv->x + dPriv->w,
 				   .y1 = dPriv->y, .y2 = dPriv->y + dPriv->h };
@@ -243,7 +243,7 @@ intelWindowMoved(struct intel_context *intel)
 				     .y2 = sarea->planeB_y + sarea->planeB_h };
       GLint areaA = driIntersectArea( drw_rect, planeA_rect );
       GLint areaB = driIntersectArea( drw_rect, planeB_rect );
-      GLuint flags = intel_fb->vblank_flags;
+      GLuint flags = dPriv->vblFlags;
       GLboolean pf_active;
       GLint pf_planes;
 
@@ -311,19 +311,24 @@ intelWindowMoved(struct intel_context *intel)
       /* Update vblank info
        */
       if (areaB > areaA || (areaA == areaB && areaB > 0)) {
-	 flags = intel_fb->vblank_flags | VBLANK_FLAG_SECONDARY;
+	 flags = dPriv->vblFlags | VBLANK_FLAG_SECONDARY;
       } else {
-	 flags = intel_fb->vblank_flags & ~VBLANK_FLAG_SECONDARY;
+	 flags = dPriv->vblFlags & ~VBLANK_FLAG_SECONDARY;
       }
 
-      if (flags != intel_fb->vblank_flags && intel_fb->vblank_flags &&
-	  !(intel_fb->vblank_flags & VBLANK_FLAG_NO_IRQ)) {
+      /* Check to see if we changed pipes */
+      if (flags != dPriv->vblFlags && dPriv->vblFlags &&
+	  !(dPriv->vblFlags & VBLANK_FLAG_NO_IRQ)) {
+	 int64_t count;
 	 drmVBlank vbl;
 	 int i;
 
+	 /*
+	  * Deal with page flipping
+	  */
 	 vbl.request.type = DRM_VBLANK_ABSOLUTE;
 
-	 if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) {
+	 if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) {
 	    vbl.request.type |= DRM_VBLANK_SECONDARY;
 	 }
 
@@ -337,9 +342,19 @@ intelWindowMoved(struct intel_context *intel)
 	    drmWaitVBlank(intel->driFd, &vbl);
 	 }
 
-	 intel_fb->vblank_flags = flags;
-	 driGetCurrentVBlank(dPriv, intel_fb->vblank_flags, &intel_fb->vbl_seq);
-	 intel_fb->vbl_waited = intel_fb->vbl_seq;
+	 /*
+	  * Update msc_base from old pipe
+	  */
+	 driDrawableGetMSC32(dPriv->driScreenPriv, dPriv, &count);
+	 dPriv->msc_base = count;
+	 /*
+	  * Then get new vblank_base and vblSeq values
+	  */
+	 dPriv->vblFlags = flags;
+	 driGetCurrentVBlank(dPriv);
+	 dPriv->vblank_base = dPriv->vblSeq;
+
+	 intel_fb->vbl_waited = dPriv->vblSeq;
 
 	 for (i = 0; i < intel_fb->pf_num_pages; i++) {
 	    if (intel_fb->color_rb[i])
@@ -347,7 +362,7 @@ intelWindowMoved(struct intel_context *intel)
 	 }
       }
    } else {
-      intel_fb->vblank_flags &= ~VBLANK_FLAG_SECONDARY;
+      dPriv->vblFlags &= ~VBLANK_FLAG_SECONDARY;
    }
 
    /* Update Mesa's notion of window size */
@@ -820,10 +835,10 @@ intelSwapBuffers(__DRIdrawablePrivate * dPriv)
  */
 
 static GLboolean
-intelScheduleSwap(const __DRIdrawablePrivate * dPriv, GLboolean *missed_target)
+intelScheduleSwap(__DRIdrawablePrivate * dPriv, GLboolean *missed_target)
 {
    struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
-   unsigned int interval = driGetVBlankInterval(dPriv, intel_fb->vblank_flags);
+   unsigned int interval;
    struct intel_context *intel =
       intelScreenContext(dPriv->driScreenPriv->private);
    const intelScreenPrivate *intelScreen = intel->intelScreen;
@@ -831,24 +846,26 @@ intelScheduleSwap(const __DRIdrawablePrivate * dPriv, GLboolean *missed_target)
    drm_i915_vblank_swap_t swap;
    GLboolean ret;
 
-   if (!intel_fb->vblank_flags ||
-       (intel_fb->vblank_flags & VBLANK_FLAG_NO_IRQ) ||
+   if (!dPriv->vblFlags ||
+       (dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) ||
        intelScreen->current_rotation != 0 ||
        intelScreen->drmMinor < (intel_fb->pf_active ? 9 : 6))
       return GL_FALSE;
 
+   interval = driGetVBlankInterval(dPriv);
+
    swap.seqtype = DRM_VBLANK_ABSOLUTE;
 
-   if (intel_fb->vblank_flags & VBLANK_FLAG_SYNC) {
+   if (dPriv->vblFlags & VBLANK_FLAG_SYNC) {
       swap.seqtype |= DRM_VBLANK_NEXTONMISS;
    } else if (interval == 0) {
       return GL_FALSE;
    }
 
    swap.drawable = dPriv->hHWDrawable;
-   target = swap.sequence = intel_fb->vbl_seq + interval;
+   target = swap.sequence = dPriv->vblSeq + interval;
 
-   if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) {
+   if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) {
       swap.seqtype |= DRM_VBLANK_SECONDARY;
    }
 
@@ -866,14 +883,14 @@ intelScheduleSwap(const __DRIdrawablePrivate * dPriv, GLboolean *missed_target)
 
    if (!drmCommandWriteRead(intel->driFd, DRM_I915_VBLANK_SWAP, &swap,
 			    sizeof(swap))) {
-      intel_fb->vbl_seq = swap.sequence;
+      dPriv->vblSeq = swap.sequence;
       swap.sequence -= target;
       *missed_target = swap.sequence > 0 && swap.sequence <= (1 << 23);
 
       intel_get_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT)->vbl_pending =
 	 intel_get_renderbuffer(&intel_fb->Base,
 				BUFFER_FRONT_LEFT)->vbl_pending =
-	 intel_fb->vbl_seq;
+	 dPriv->vblSeq;
 
       if (swap.seqtype & DRM_VBLANK_FLIP) {
 	 intel_flip_renderbuffers(intel_fb);
@@ -918,8 +935,7 @@ intelSwapBuffers(__DRIdrawablePrivate * dPriv)
 
          if (screen->current_rotation != 0 ||
 	     !intelScheduleSwap(dPriv, &missed_target)) {
-	    driWaitForVBlank(dPriv, &intel_fb->vbl_seq, intel_fb->vblank_flags,
-			     &missed_target);
+	    driWaitForVBlank(dPriv, &missed_target);
 
 	    if (screen->current_rotation != 0 || !intelPageFlip(dPriv)) {
 	       intelCopyBuffer(dPriv, NULL);
diff --git a/src/mesa/drivers/dri/i915/intel_bufmgr_ttm.c b/src/mesa/drivers/dri/i915/intel_bufmgr_ttm.c
new file mode 100644
index 0000000000..32d9886091
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_bufmgr_ttm.c
@@ -0,0 +1,833 @@
+/**************************************************************************
+ * 
+ * Copyright © 2007 Red Hat Inc.
+ * Copyright © 2007 Intel Corporation
+ * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
+ * All Rights Reserved.
+ * 
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ * 
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ * 
+ * 
+ **************************************************************************/
+/*
+ * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
+ *          Keith Whitwell <keithw-at-tungstengraphics-dot-com>
+ *	    Eric Anholt <eric@anholt.net>
+ *	    Dave Airlie <airlied@linux.ie>
+ */
+
+#include <xf86drm.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include "glthread.h"
+#include "errno.h"
+#include "mtypes.h"
+#include "dri_bufmgr.h"
+#include "string.h"
+#include "imports.h"
+
+#include "i915_drm.h"
+
+#include "intel_bufmgr_ttm.h"
+
+#define BUFMGR_DEBUG 0
+
+struct intel_reloc_info
+{
+   GLuint type;
+   GLuint reloc;
+   GLuint delta;                /* not needed? */
+   GLuint index;
+   drm_handle_t handle;
+};
+
+struct intel_bo_node
+{
+    drmMMListHead head;
+    drmBO *buf;
+    struct drm_i915_op_arg bo_arg;
+    unsigned long arg0;
+    unsigned long arg1;
+    void (*destroy)(void *);
+    void *priv;
+};
+
+struct intel_bo_reloc_list
+{
+    drmMMListHead head;
+    drmBO buf;
+    uint32_t *relocs;
+};
+
+struct intel_bo_reloc_node
+{
+    drmMMListHead head;
+    drm_handle_t handle;
+    uint32_t nr_reloc_types;
+    struct intel_bo_reloc_list type_list;
+};
+
+struct intel_bo_list {
+    unsigned numCurrent;
+    drmMMListHead list;
+    void (*destroy)(void *node);
+};
+
+typedef struct _dri_bufmgr_ttm {
+   dri_bufmgr bufmgr;
+
+   int fd;
+   _glthread_Mutex mutex;
+   unsigned int fence_type;
+   unsigned int fence_type_flush;
+
+   uint32_t max_relocs;
+   /** ttm relocation list */
+   struct intel_bo_list list;
+   struct intel_bo_list reloc_list;
+
+} dri_bufmgr_ttm;
+
+typedef struct _dri_bo_ttm {
+   dri_bo bo;
+
+   int refcount;		/* Protected by bufmgr->mutex */
+   drmBO drm_bo;
+   const char *name;
+} dri_bo_ttm;
+
+typedef struct _dri_fence_ttm
+{
+   dri_fence fence;
+
+   int refcount;		/* Protected by bufmgr->mutex */
+   const char *name;
+   drmFence drm_fence;
+} dri_fence_ttm;
+
+
+static void intel_bo_free_list(struct intel_bo_list *list)
+{
+    struct intel_bo_node *node;
+    drmMMListHead *l;
+
+    l = list->list.next;
+    while(l != &list->list) {
+	DRMLISTDEL(l);
+	node = DRMLISTENTRY(struct intel_bo_node, l, head);
+	list->destroy(node);
+	l = list->list.next;
+	list->numCurrent--;
+    }
+}
+
+static void generic_destroy(void *nodep)
+{
+    free(nodep);
+}
+
+static int intel_create_bo_list(int numTarget, struct intel_bo_list *list, void (*destroy)(void *))
+{
+    DRMINITLISTHEAD(&list->list);
+    list->numCurrent = 0;
+    if (destroy)
+        list->destroy = destroy;
+    else
+        list->destroy = generic_destroy;
+    return 0;
+}
+
+
+static struct drm_i915_op_arg *
+intel_setup_validate_list(int fd, struct intel_bo_list *list, struct intel_bo_list *reloc_list, GLuint *count_p)
+{
+    struct intel_bo_node *node;
+    struct intel_bo_reloc_node *rl_node;
+    drmMMListHead *l, *rl;
+    struct drm_i915_op_arg *arg, *first;
+    struct drm_bo_op_req *req;
+    uint64_t *prevNext = NULL;
+    GLuint count = 0;
+
+    first = NULL;
+
+    for (l = list->list.next; l != &list->list; l = l->next) {
+        node = DRMLISTENTRY(struct intel_bo_node, l, head);
+
+        arg = &node->bo_arg;
+        req = &arg->d.req;
+
+        if (!first)
+            first = arg;
+
+	if (prevNext)
+	    *prevNext = (unsigned long) arg;
+
+	memset(arg, 0, sizeof(*arg));
+	prevNext = &arg->next;
+	req->bo_req.handle = node->buf->handle;
+	req->op = drm_bo_validate;
+	req->bo_req.flags = node->arg0;
+	req->bo_req.hint = 0;
+	req->bo_req.mask = node->arg1;
+	req->bo_req.fence_class = 0; /* Backwards compat. */
+	arg->reloc_handle = 0;
+
+	for (rl = reloc_list->list.next; rl != &reloc_list->list; rl = rl->next) {
+	    rl_node = DRMLISTENTRY(struct intel_bo_reloc_node, rl, head);
+
+	    if (rl_node->handle == node->buf->handle) {
+		arg->reloc_handle = rl_node->type_list.buf.handle;
+	    }
+	}
+	count++;
+    }
+
+    if (!first)
+	return 0;
+
+    *count_p = count;
+    return first;
+}
+
+static void intel_free_validate_list(int fd, struct intel_bo_list *list)
+{
+    struct intel_bo_node *node;
+    drmMMListHead *l;
+
+    for (l = list->list.next; l != &list->list; l = l->next) {
+        node = DRMLISTENTRY(struct intel_bo_node, l, head);    
+
+	if (node->destroy)
+	    (*node->destroy)(node->priv);
+
+    }
+}
+
+static void intel_free_reloc_list(int fd, struct intel_bo_list *reloc_list)
+{
+    struct intel_bo_reloc_node *reloc_node;
+    drmMMListHead *rl, *tmp;
+
+    for (rl = reloc_list->list.next, tmp = rl->next; rl != &reloc_list->list; rl = tmp, tmp = rl->next) {
+	reloc_node = DRMLISTENTRY(struct intel_bo_reloc_node, rl, head);
+
+	DRMLISTDEL(rl);
+
+	if (reloc_node->nr_reloc_types > 1) {
+	    
+	    /* TODO */
+	}
+
+	drmBOUnmap(fd, &reloc_node->type_list.buf);
+	drmBOUnreference(fd, &reloc_node->type_list.buf);
+	free(reloc_node);
+    }
+}
+
+static int intel_add_validate_buffer(struct intel_bo_list *list, dri_bo *buf, unsigned flags,
+				     unsigned mask, int *itemLoc, void (*destroy_cb)(void *))
+{
+    struct intel_bo_node *node, *cur;
+    drmMMListHead *l;
+    int count = 0;
+    int ret = 0;
+    drmBO *buf_bo = &((dri_bo_ttm *)buf)->drm_bo;
+    cur = NULL;
+
+    for (l = list->list.next; l != &list->list; l = l->next) {
+	node = DRMLISTENTRY(struct intel_bo_node, l, head);
+	if (node->buf->handle == buf_bo->handle) {
+	    cur = node;
+	    break;
+	}
+	count++;
+    }
+    
+    if (!cur) {
+	cur = drmMalloc(sizeof(*cur));
+	if (!cur) {
+	    return -ENOMEM;
+	}
+	cur->buf = buf_bo;
+	cur->priv = buf;
+	cur->arg0 = flags;
+	cur->arg1 = mask;
+	cur->destroy = destroy_cb;
+	ret = 1;
+
+	DRMLISTADDTAIL(&cur->head, &list->list);
+
+    } else {
+	unsigned memMask = (cur->arg1 | mask) & DRM_BO_MASK_MEM;
+	unsigned memFlags = cur->arg0 & flags & memMask;
+	
+	if (!memFlags) {
+	    return -EINVAL;
+	}
+	if (mask & cur->arg1 & ~DRM_BO_MASK_MEM  & (cur->arg0 ^ flags)) {
+	    return -EINVAL;
+	}
+	cur->arg1 |= mask;
+	cur->arg0 = memFlags | ((cur->arg0 | flags) & 
+				cur->arg1 & ~DRM_BO_MASK_MEM);
+    }
+    *itemLoc = count;
+    return ret;
+}
+
+
+#define RELOC_BUF_SIZE(x) ((I915_RELOC_HEADER + x * I915_RELOC0_STRIDE) * sizeof(uint32_t))
+
+static int intel_create_new_reloc_type_list(int fd, struct intel_bo_reloc_list *cur_type, int max_relocs)
+{
+    int ret;
+    
+    /* should allocate a drmBO here */
+    ret = drmBOCreate(fd, RELOC_BUF_SIZE(max_relocs), 0,
+		      NULL,
+		      DRM_BO_FLAG_MEM_LOCAL | DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_MAPPABLE | DRM_BO_FLAG_CACHED,
+		      0, &cur_type->buf);
+    if (ret)
+	return ret;
+    
+    ret = drmBOMap(fd, &cur_type->buf, DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0, (void **)&cur_type->relocs);
+    if (ret)
+	return ret;
+    return 0;
+}
+
+
+static int intel_add_validate_reloc(int fd, struct intel_bo_list *reloc_list, struct intel_reloc_info *reloc_info, uint32_t max_relocs)
+{
+    struct intel_bo_reloc_node *rl_node, *cur;
+    drmMMListHead *rl, *l;
+    int ret = 0;
+    uint32_t *reloc_start;
+    int num_relocs;
+    struct intel_bo_reloc_list *cur_type;
+
+    cur = NULL;
+
+    for (rl = reloc_list->list.next; rl != &reloc_list->list; rl = rl->next) {
+	rl_node = DRMLISTENTRY(struct intel_bo_reloc_node, rl, head);
+	if (rl_node->handle == reloc_info->handle) {
+	    cur = rl_node;
+	    break;
+	}
+    }
+
+    if (!cur) {
+
+	cur = malloc(sizeof(*cur));
+	if (!cur)
+	    return -ENOMEM;
+
+	cur->nr_reloc_types = 1;
+	cur->handle = reloc_info->handle;
+	cur_type = &cur->type_list;
+
+	DRMINITLISTHEAD(&cur->type_list.head);
+	ret = intel_create_new_reloc_type_list(fd, cur_type, max_relocs);
+	if (ret) {
+	    return -1;
+	}
+	DRMLISTADDTAIL(&cur->head, &reloc_list->list);
+
+	cur_type->relocs[0] = 0 | (reloc_info->type << 16);
+	cur_type->relocs[1] = 0; // next reloc buffer handle is 0
+
+    } else {
+	int found = 0;
+	if ((cur->type_list.relocs[0] >> 16) == reloc_info->type) {
+		cur_type = &cur->type_list;
+		found = 1;
+	} else {
+	    for (l = cur->type_list.head.next; l != &cur->type_list.head; l = l->next) {
+	        cur_type = DRMLISTENTRY(struct intel_bo_reloc_list, l, head);
+	        if (((cur_type->relocs[0] >> 16) & 0xffff) == reloc_info->type)
+	    	    found = 1;
+		break;
+	    }
+        }
+	
+	/* didn't find the relocation type */
+	if (!found) {
+	    cur_type = malloc(sizeof(*cur_type));
+	    if (!cur_type) {
+		return -ENOMEM;
+	    }
+	    
+	    ret = intel_create_new_reloc_type_list(fd, cur_type, max_relocs);
+	    DRMLISTADDTAIL(&cur_type->head, &cur->type_list.head);
+
+	    cur_type->relocs[0] = (reloc_info->type << 16);
+	    cur_type->relocs[1] = 0;
+
+	    cur->nr_reloc_types++;
+	}
+    }
+
+    reloc_start = cur_type->relocs;
+
+    num_relocs = (reloc_start[0] & 0xffff);
+
+    reloc_start[num_relocs*I915_RELOC0_STRIDE + I915_RELOC_HEADER] = reloc_info->reloc;
+    reloc_start[num_relocs*I915_RELOC0_STRIDE + I915_RELOC_HEADER+1] = reloc_info->delta;
+    reloc_start[num_relocs*I915_RELOC0_STRIDE + I915_RELOC_HEADER+2] = reloc_info->index;
+    reloc_start[0]++;
+    if (((reloc_start[0] & 0xffff)) > (max_relocs)) {
+	return -ENOMEM;
+    }
+    return 0;
+}
+
+
+#if 0
+int
+driFenceSignaled(DriFenceObject * fence, unsigned type)
+{
+   int signaled;
+   int ret;
+
+   if (fence == NULL)
+      return GL_TRUE;
+
+   _glthread_LOCK_MUTEX(fence->mutex);
+   ret = drmFenceSignaled(bufmgr_ttm->fd, &fence->fence, type, &signaled);
+   _glthread_UNLOCK_MUTEX(fence->mutex);
+   BM_CKFATAL(ret);
+   return signaled;
+}
+#endif
+
+static dri_bo *
+dri_ttm_alloc(dri_bufmgr *bufmgr, const char *name,
+	      unsigned long size, unsigned int alignment,
+	      unsigned int location_mask)
+{
+   dri_bufmgr_ttm *ttm_bufmgr;
+   dri_bo_ttm *ttm_buf;
+   unsigned int pageSize = getpagesize();
+   int ret;
+   unsigned int flags, hint;
+
+   ttm_bufmgr = (dri_bufmgr_ttm *)bufmgr;
+
+   ttm_buf = malloc(sizeof(*ttm_buf));
+   if (!ttm_buf)
+      return NULL;
+
+   /* The mask argument doesn't do anything for us that we want other than
+    * determine which pool (TTM or local) the buffer is allocated into, so just
+    * pass all of the allocation class flags.
+    */
+   flags = location_mask | DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE |
+      DRM_BO_FLAG_EXE;
+   /* No hints we want to use. */
+   hint = 0;
+
+   ret = drmBOCreate(ttm_bufmgr->fd, size, alignment / pageSize,
+		     NULL, flags, hint, &ttm_buf->drm_bo);
+   if (ret != 0) {
+      free(ttm_buf);
+      return NULL;
+   }
+   ttm_buf->bo.size = ttm_buf->drm_bo.size;
+   ttm_buf->bo.offset = ttm_buf->drm_bo.offset;
+   ttm_buf->bo.virtual = NULL;
+   ttm_buf->bo.bufmgr = bufmgr;
+   ttm_buf->name = name;
+   ttm_buf->refcount = 1;
+
+#if BUFMGR_DEBUG
+   fprintf(stderr, "bo_create: %p (%s)\n", &ttm_buf->bo, ttm_buf->name);
+#endif
+
+   return &ttm_buf->bo;
+}
+
+/* Our TTM backend doesn't allow creation of static buffers, as that requires
+ * privelege for the non-fake case, and the lock in the fake case where we were
+ * working around the X Server not creating buffers and passing handles to us.
+ */
+static dri_bo *
+dri_ttm_alloc_static(dri_bufmgr *bufmgr, const char *name,
+		     unsigned long offset, unsigned long size, void *virtual,
+		     unsigned int location_mask)
+{
+   return NULL;
+}
+
+/** Returns a dri_bo wrapping the given buffer object handle.
+ *
+ * This can be used when one application needs to pass a buffer object
+ * to another.
+ */
+dri_bo *
+intel_ttm_bo_create_from_handle(dri_bufmgr *bufmgr, const char *name,
+			      unsigned int handle)
+{
+   dri_bufmgr_ttm *ttm_bufmgr;
+   dri_bo_ttm *ttm_buf;
+   int ret;
+
+   ttm_bufmgr = (dri_bufmgr_ttm *)bufmgr;
+
+   ttm_buf = malloc(sizeof(*ttm_buf));
+   if (!ttm_buf)
+      return NULL;
+
+   ret = drmBOReference(ttm_bufmgr->fd, handle, &ttm_buf->drm_bo);
+   if (ret != 0) {
+      free(ttm_buf);
+      return NULL;
+   }
+   ttm_buf->bo.size = ttm_buf->drm_bo.size;
+   ttm_buf->bo.offset = ttm_buf->drm_bo.offset;
+   ttm_buf->bo.virtual = NULL;
+   ttm_buf->bo.bufmgr = bufmgr;
+   ttm_buf->name = name;
+   ttm_buf->refcount = 1;
+
+#if BUFMGR_DEBUG
+   fprintf(stderr, "bo_create_from_handle: %p %08x (%s)\n", &ttm_buf->bo, handle,
+	   ttm_buf->name);
+#endif
+
+   return &ttm_buf->bo;
+}
+
+static void
+dri_ttm_bo_reference(dri_bo *buf)
+{
+   dri_bufmgr_ttm *bufmgr_ttm = (dri_bufmgr_ttm *)buf->bufmgr;
+   dri_bo_ttm *ttm_buf = (dri_bo_ttm *)buf;
+
+   _glthread_LOCK_MUTEX(bufmgr_ttm->mutex);
+   ttm_buf->refcount++;
+   _glthread_UNLOCK_MUTEX(bufmgr_ttm->mutex);
+}
+
+static void
+dri_ttm_bo_unreference(dri_bo *buf)
+{
+   dri_bufmgr_ttm *bufmgr_ttm = (dri_bufmgr_ttm *)buf->bufmgr;
+   dri_bo_ttm *ttm_buf = (dri_bo_ttm *)buf;
+
+   if (!buf)
+      return;
+
+   _glthread_LOCK_MUTEX(bufmgr_ttm->mutex);
+   if (--ttm_buf->refcount == 0) {
+      int ret;
+
+      ret = drmBOUnreference(bufmgr_ttm->fd, &ttm_buf->drm_bo);
+      if (ret != 0) {
+	 fprintf(stderr, "drmBOUnreference failed (%s): %s\n", ttm_buf->name,
+		 strerror(-ret));
+      }
+#if BUFMGR_DEBUG
+      fprintf(stderr, "bo_unreference final: %p (%s)\n",
+	      &ttm_buf->bo, ttm_buf->name);
+#endif
+      _glthread_UNLOCK_MUTEX(bufmgr_ttm->mutex);
+      free(buf);
+      return;
+   }
+   _glthread_UNLOCK_MUTEX(bufmgr_ttm->mutex);
+}
+
+static int
+dri_ttm_bo_map(dri_bo *buf, GLboolean write_enable)
+{
+   dri_bufmgr_ttm *bufmgr_ttm;
+   dri_bo_ttm *ttm_buf = (dri_bo_ttm *)buf;
+   unsigned int flags;
+
+   bufmgr_ttm = (dri_bufmgr_ttm *)buf->bufmgr;
+
+   flags = DRM_BO_FLAG_READ;
+   if (write_enable)
+       flags |= DRM_BO_FLAG_WRITE;
+
+   assert(buf->virtual == NULL);
+
+#if BUFMGR_DEBUG
+   fprintf(stderr, "bo_map: %p (%s)\n", &ttm_buf->bo, ttm_buf->name);
+#endif
+
+   return drmBOMap(bufmgr_ttm->fd, &ttm_buf->drm_bo, flags, 0, &buf->virtual);
+}
+
+static int
+dri_ttm_bo_unmap(dri_bo *buf)
+{
+   dri_bufmgr_ttm *bufmgr_ttm;
+   dri_bo_ttm *ttm_buf = (dri_bo_ttm *)buf;
+
+   if (buf == NULL)
+      return 0;
+
+   bufmgr_ttm = (dri_bufmgr_ttm *)buf->bufmgr;
+
+   assert(buf->virtual != NULL);
+
+   buf->virtual = NULL;
+
+#if BUFMGR_DEBUG
+   fprintf(stderr, "bo_unmap: %p (%s)\n", &ttm_buf->bo, ttm_buf->name);
+#endif
+
+   return drmBOUnmap(bufmgr_ttm->fd, &ttm_buf->drm_bo);
+}
+
+/* Returns a dri_bo wrapping the given buffer object handle.
+ *
+ * This can be used when one application needs to pass a buffer object
+ * to another.
+ */
+dri_fence *
+intel_ttm_fence_create_from_arg(dri_bufmgr *bufmgr, const char *name,
+				drm_fence_arg_t *arg)
+{
+   dri_bufmgr_ttm *ttm_bufmgr;
+   dri_fence_ttm *ttm_fence;
+
+   ttm_bufmgr = (dri_bufmgr_ttm *)bufmgr;
+
+   ttm_fence = malloc(sizeof(*ttm_fence));
+   if (!ttm_fence)
+      return NULL;
+
+   ttm_fence->drm_fence.handle = arg->handle;
+   ttm_fence->drm_fence.fence_class = arg->fence_class;
+   ttm_fence->drm_fence.type = arg->type;
+   ttm_fence->drm_fence.flags = arg->flags;
+   ttm_fence->drm_fence.signaled = 0;
+   ttm_fence->drm_fence.sequence = arg->sequence;
+
+   ttm_fence->fence.bufmgr = bufmgr;
+   ttm_fence->name = name;
+   ttm_fence->refcount = 1;
+
+#if BUFMGR_DEBUG
+   fprintf(stderr, "fence_create_from_handle: %p (%s)\n", &ttm_fence->fence,
+	   ttm_fence->name);
+#endif
+
+   return &ttm_fence->fence;
+}
+
+
+static void
+dri_ttm_fence_reference(dri_fence *fence)
+{
+   dri_fence_ttm *fence_ttm = (dri_fence_ttm *)fence;
+   dri_bufmgr_ttm *bufmgr_ttm = (dri_bufmgr_ttm *)fence->bufmgr;
+
+   _glthread_LOCK_MUTEX(bufmgr_ttm->mutex);
+   ++fence_ttm->refcount;
+   _glthread_UNLOCK_MUTEX(bufmgr_ttm->mutex);
+#if BUFMGR_DEBUG
+   fprintf(stderr, "fence_reference: %p (%s)\n", &fence_ttm->fence,
+	   fence_ttm->name);
+#endif
+}
+
+static void
+dri_ttm_fence_unreference(dri_fence *fence)
+{
+   dri_fence_ttm *fence_ttm = (dri_fence_ttm *)fence;
+   dri_bufmgr_ttm *bufmgr_ttm = (dri_bufmgr_ttm *)fence->bufmgr;
+
+   if (!fence)
+      return;
+
+#if BUFMGR_DEBUG
+   fprintf(stderr, "fence_unreference: %p (%s)\n", &fence_ttm->fence,
+	   fence_ttm->name);
+#endif
+   _glthread_LOCK_MUTEX(bufmgr_ttm->mutex);
+   if (--fence_ttm->refcount == 0) {
+      int ret;
+
+      ret = drmFenceUnreference(bufmgr_ttm->fd, &fence_ttm->drm_fence);
+      if (ret != 0) {
+	 fprintf(stderr, "drmFenceUnreference failed (%s): %s\n",
+		 fence_ttm->name, strerror(-ret));
+      }
+
+      _glthread_UNLOCK_MUTEX(bufmgr_ttm->mutex);
+      free(fence);
+      return;
+   }
+   _glthread_UNLOCK_MUTEX(bufmgr_ttm->mutex);
+}
+
+static void
+dri_ttm_fence_wait(dri_fence *fence)
+{
+   dri_fence_ttm *fence_ttm = (dri_fence_ttm *)fence;
+   dri_bufmgr_ttm *bufmgr_ttm = (dri_bufmgr_ttm *)fence->bufmgr;
+   int ret;
+
+   _glthread_LOCK_MUTEX(bufmgr_ttm->mutex);
+   ret = drmFenceWait(bufmgr_ttm->fd, 0, &fence_ttm->drm_fence, 0);
+   _glthread_UNLOCK_MUTEX(bufmgr_ttm->mutex);
+   if (ret != 0) {
+      _mesa_printf("%s:%d: Error %d waiting for fence %s.\n",
+		   __FILE__, __LINE__, ret, fence_ttm->name);
+      abort();
+   }
+
+#if BUFMGR_DEBUG
+   fprintf(stderr, "fence_wait: %p (%s)\n", &fence_ttm->fence,
+	   fence_ttm->name);
+#endif
+}
+
+static void
+dri_bufmgr_ttm_destroy(dri_bufmgr *bufmgr)
+{
+   dri_bufmgr_ttm *bufmgr_ttm = (dri_bufmgr_ttm *)bufmgr;
+
+   intel_bo_free_list(&bufmgr_ttm->list);
+   intel_bo_free_list(&bufmgr_ttm->reloc_list);
+
+   _glthread_DESTROY_MUTEX(bufmgr_ttm->mutex);
+   free(bufmgr);
+}
+
+
+static void intel_dribo_destroy_callback(void *priv)
+{
+   dri_bo *dribo = priv;
+   
+   if (dribo) {
+     dri_bo_unreference(dribo);
+   }
+}
+
+static void
+dri_ttm_emit_reloc(dri_bo *batch_buf, GLuint flags, GLuint delta, GLuint offset,
+		    dri_bo *relocatee)
+{
+   dri_bo_ttm *ttm_buf = (dri_bo_ttm *)batch_buf;
+   dri_bufmgr_ttm *bufmgr_ttm = (dri_bufmgr_ttm *)batch_buf->bufmgr;
+   int newItem;
+   struct intel_reloc_info reloc;
+   int mask;
+   int ret;
+
+   mask = DRM_BO_MASK_MEM;
+   mask |= flags & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_EXE);
+
+   ret = intel_add_validate_buffer(&bufmgr_ttm->list, relocatee, flags, mask, &newItem, intel_dribo_destroy_callback);
+   if (ret < 0)
+     return;
+
+   if (ret == 1) {
+      dri_bo_reference(relocatee);
+   }
+
+   reloc.type = I915_RELOC_TYPE_0;
+   reloc.reloc = offset;
+   reloc.delta = delta;
+   reloc.index = newItem;
+   reloc.handle = ttm_buf->drm_bo.handle;
+
+   intel_add_validate_reloc(bufmgr_ttm->fd, &bufmgr_ttm->reloc_list, &reloc, bufmgr_ttm->max_relocs);
+   return;
+}
+
+
+static void *
+dri_ttm_process_reloc(dri_bo *batch_buf, GLuint *count)
+{
+   dri_bufmgr_ttm *bufmgr_ttm = (dri_bufmgr_ttm *)batch_buf->bufmgr;
+   void *ptr;
+   int itemLoc;
+
+   dri_bo_unmap(batch_buf);
+
+   intel_add_validate_buffer(&bufmgr_ttm->list, batch_buf, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_EXE,
+			     DRM_BO_MASK_MEM | DRM_BO_FLAG_EXE, &itemLoc, NULL);
+
+   ptr = intel_setup_validate_list(bufmgr_ttm->fd, &bufmgr_ttm->list, &bufmgr_ttm->reloc_list, count);
+
+   return ptr;
+}
+
+static void
+dri_ttm_post_submit(dri_bo *batch_buf, dri_fence **last_fence)
+{
+   dri_bufmgr_ttm *bufmgr_ttm = (dri_bufmgr_ttm *)batch_buf->bufmgr;
+
+   intel_free_validate_list(bufmgr_ttm->fd, &bufmgr_ttm->list);
+   intel_free_reloc_list(bufmgr_ttm->fd, &bufmgr_ttm->reloc_list);
+
+   intel_bo_free_list(&bufmgr_ttm->list);
+}
+
+/**
+ * Initializes the TTM buffer manager, which uses the kernel to allocate, map,
+ * and manage map buffer objections.
+ *
+ * \param fd File descriptor of the opened DRM device.
+ * \param fence_type Driver-specific fence type used for fences with no flush.
+ * \param fence_type_flush Driver-specific fence type used for fences with a
+ *	  flush.
+ */
+dri_bufmgr *
+intel_bufmgr_ttm_init(int fd, unsigned int fence_type,
+		      unsigned int fence_type_flush, int batch_size)
+{
+   dri_bufmgr_ttm *bufmgr_ttm;
+
+   bufmgr_ttm = malloc(sizeof(*bufmgr_ttm));
+   bufmgr_ttm->fd = fd;
+   bufmgr_ttm->fence_type = fence_type;
+   bufmgr_ttm->fence_type_flush = fence_type_flush;
+   _glthread_INIT_MUTEX(bufmgr_ttm->mutex);
+
+   /* lets go with one relocation per every four dwords - purely heuristic */
+   bufmgr_ttm->max_relocs = batch_size / sizeof(uint32_t) / 4;
+
+   intel_create_bo_list(10, &bufmgr_ttm->list, NULL);
+   intel_create_bo_list(1, &bufmgr_ttm->reloc_list, NULL);
+
+   bufmgr_ttm->bufmgr.bo_alloc = dri_ttm_alloc;
+   bufmgr_ttm->bufmgr.bo_alloc_static = dri_ttm_alloc_static;
+   bufmgr_ttm->bufmgr.bo_reference = dri_ttm_bo_reference;
+   bufmgr_ttm->bufmgr.bo_unreference = dri_ttm_bo_unreference;
+   bufmgr_ttm->bufmgr.bo_map = dri_ttm_bo_map;
+   bufmgr_ttm->bufmgr.bo_unmap = dri_ttm_bo_unmap;
+   bufmgr_ttm->bufmgr.fence_reference = dri_ttm_fence_reference;
+   bufmgr_ttm->bufmgr.fence_unreference = dri_ttm_fence_unreference;
+   bufmgr_ttm->bufmgr.fence_wait = dri_ttm_fence_wait;
+   bufmgr_ttm->bufmgr.destroy = dri_bufmgr_ttm_destroy;
+   bufmgr_ttm->bufmgr.emit_reloc = dri_ttm_emit_reloc;
+   bufmgr_ttm->bufmgr.process_relocs = dri_ttm_process_reloc;
+   bufmgr_ttm->bufmgr.post_submit = dri_ttm_post_submit;
+   return &bufmgr_ttm->bufmgr;
+}
+
diff --git a/src/mesa/drivers/dri/i915/intel_bufmgr_ttm.h b/src/mesa/drivers/dri/i915/intel_bufmgr_ttm.h
new file mode 100644
index 0000000000..0738839cef
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_bufmgr_ttm.h
@@ -0,0 +1,17 @@
+
+#ifndef INTEL_BUFMGR_TTM_H
+#define INTEL_BUFMGR_TTM_H
+
+#include "dri_bufmgr.h"
+
+extern dri_bo *intel_ttm_bo_create_from_handle(dri_bufmgr *bufmgr, const char *name,
+					       unsigned int handle);
+
+dri_fence *intel_ttm_fence_create_from_arg(dri_bufmgr *bufmgr, const char *name,
+					   drm_fence_arg_t *arg);
+
+
+dri_bufmgr *intel_bufmgr_ttm_init(int fd, unsigned int fence_type,
+				  unsigned int fence_type_flush, int batch_size);
+
+#endif
diff --git a/src/mesa/drivers/dri/i915/intel_context.c b/src/mesa/drivers/dri/i915/intel_context.c
index 041a155fe7..b85b0c2939 100644
--- a/src/mesa/drivers/dri/i915/intel_context.c
+++ b/src/mesa/drivers/dri/i915/intel_context.c
@@ -613,21 +613,20 @@ intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
       if (intel->ctx.DrawBuffer == &intel_fb->Base) {
 
 	 if (intel->driDrawable != driDrawPriv) {
-	    if (driDrawPriv->pdraw->swap_interval == (unsigned)-1) {
+	    if (driDrawPriv->swap_interval == (unsigned)-1) {
 	       int i;
 
-	       intel_fb->vblank_flags = (intel->intelScreen->irq_active != 0)
+	       driDrawPriv->vblFlags = (intel->intelScreen->irq_active != 0)
 		  ? driGetDefaultVBlankFlags(&intel->optionCache)
 		 : VBLANK_FLAG_NO_IRQ;
 
 	       (*dri_interface->getUST) (&intel_fb->swap_ust);
-	       driDrawableInitVBlank(driDrawPriv, intel_fb->vblank_flags,
-				     &intel_fb->vbl_seq);
-	       intel_fb->vbl_waited = intel_fb->vbl_seq;
+	       driDrawableInitVBlank(driDrawPriv);
+	       intel_fb->vbl_waited = driDrawPriv->vblSeq;
 
 	       for (i = 0; i < (intel->intelScreen->third.handle ? 3 : 2); i++) {
 		  if (intel_fb->color_rb[i])
-		     intel_fb->color_rb[i]->vbl_pending = intel_fb->vbl_seq;
+		     intel_fb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq;
 	       }
 	    }
 	    intel->driDrawable = driDrawPriv;
@@ -731,6 +730,7 @@ intelContendedLock(struct intel_context *intel, GLuint flags)
  */
 void LOCK_HARDWARE( struct intel_context *intel )
 {
+    __DRIdrawablePrivate *dPriv = intel->driDrawable;
     char __ret=0;
     struct intel_framebuffer *intel_fb = NULL;
     struct intel_renderbuffer *intel_rb = NULL;
@@ -748,14 +748,14 @@ void LOCK_HARDWARE( struct intel_context *intel )
 				    BUFFER_BACK_LEFT);
     }
 
-    if (intel_rb && intel_fb->vblank_flags &&
-	!(intel_fb->vblank_flags & VBLANK_FLAG_NO_IRQ) &&
+    if (intel_rb && dPriv->vblFlags &&
+	!(dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) &&
 	(intel_fb->vbl_waited - intel_rb->vbl_pending) > (1<<23)) {
 	drmVBlank vbl;
 
 	vbl.request.type = DRM_VBLANK_ABSOLUTE;
 
-	if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) {
+	if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) {
 	    vbl.request.type |= DRM_VBLANK_SECONDARY;
 	}
 
diff --git a/src/mesa/drivers/dri/i915/intel_context.h b/src/mesa/drivers/dri/i915/intel_context.h
index 1e9ccd5cdc..ce9a362944 100644
--- a/src/mesa/drivers/dri/i915/intel_context.h
+++ b/src/mesa/drivers/dri/i915/intel_context.h
@@ -292,6 +292,8 @@ extern char *__progname;
 #define SUBPIXEL_X 0.125
 #define SUBPIXEL_Y 0.125
 
+#define ALIGN(value, alignment)  ((value + alignment - 1) & ~(alignment - 1))
+
 #define INTEL_FIREVERTICES(intel)		\
 do {						\
    if ((intel)->prim.flush)			\
@@ -460,9 +462,6 @@ extern void intelInitStateFuncs(struct dd_function_table *functions);
 #define BLENDFACT_INV_CONST_ALPHA	0x0f
 #define BLENDFACT_MASK          	0x0f
 
-#define MI_BATCH_BUFFER_END 	(0xA<<23)
-
-
 extern int intel_translate_compare_func(GLenum func);
 extern int intel_translate_stencil_op(GLenum op);
 extern int intel_translate_blend_factor(GLenum factor);
diff --git a/src/mesa/drivers/dri/i915/intel_fbo.h b/src/mesa/drivers/dri/i915/intel_fbo.h
index 411d634231..f9a11d02e3 100644
--- a/src/mesa/drivers/dri/i915/intel_fbo.h
+++ b/src/mesa/drivers/dri/i915/intel_fbo.h
@@ -50,8 +50,6 @@ struct intel_framebuffer
 
    /* VBI
     */
-   GLuint vbl_seq;
-   GLuint vblank_flags;
    GLuint vbl_waited;
 
    int64_t swap_ust;
diff --git a/src/mesa/drivers/dri/i915/intel_ioctl.c b/src/mesa/drivers/dri/i915/intel_ioctl.c
index 6e76737c78..94f7e73ecf 100644
--- a/src/mesa/drivers/dri/i915/intel_ioctl.c
+++ b/src/mesa/drivers/dri/i915/intel_ioctl.c
@@ -42,6 +42,8 @@
 #include "intel_regions.h"
 #include "drm.h"
 
+#include "intel_bufmgr_ttm.h"
+
 #define FILE_DEBUG_FLAG DEBUG_IOCTL
 
 int
@@ -105,9 +107,6 @@ intel_batch_ioctl(struct intel_context *intel,
     * hardware contexts which would preserve statechanges beyond a
     * single buffer.
     */
-
-
-
    batch.start = start_offset;
    batch.used = used;
    batch.cliprects = intel->pClipRects;
@@ -133,3 +132,56 @@ intel_batch_ioctl(struct intel_context *intel,
     */
    intel->vtbl.lost_hardware(intel);
 }
+
+void
+intel_exec_ioctl(struct intel_context *intel,
+		 GLuint used,
+		 GLboolean ignore_cliprects, GLboolean allow_unlock,
+		 void *start, GLuint count, dri_fence **fence)
+{
+   struct drm_i915_execbuffer execbuf;
+   dri_fence *fo;
+
+   assert(intel->locked);
+   assert(used);
+
+   if (*fence) {
+     dri_fence_unreference(*fence);
+   }
+
+   memset(&execbuf, 0, sizeof(execbuf));
+
+   execbuf.num_buffers = count;
+   execbuf.batch.used = used;
+   execbuf.batch.cliprects = intel->pClipRects;
+   execbuf.batch.num_cliprects = ignore_cliprects ? 0 : intel->numClipRects;
+   execbuf.batch.DR1 = 0;
+   execbuf.batch.DR4 = ((((GLuint) intel->drawX) & 0xffff) |
+			(((GLuint) intel->drawY) << 16));
+
+   execbuf.ops_list = (unsigned)start; // TODO
+   execbuf.fence_arg.flags = DRM_FENCE_FLAG_SHAREABLE | DRM_I915_FENCE_FLAG_FLUSHED;
+
+   if (drmCommandWriteRead(intel->driFd, DRM_I915_EXECBUFFER, &execbuf,
+                       sizeof(execbuf))) {
+      fprintf(stderr, "DRM_I830_EXECBUFFER: %d\n", -errno);
+      UNLOCK_HARDWARE(intel);
+      exit(1);
+   }
+
+
+   fo = intel_ttm_fence_create_from_arg(intel->intelScreen->bufmgr, "fence buffers",
+					&execbuf.fence_arg);
+   if (!fo) {
+      fprintf(stderr, "failed to fence handle: %08x\n", execbuf.fence_arg.handle);
+      UNLOCK_HARDWARE(intel);
+      exit(1);
+   }
+   *fence = fo;
+
+   /* FIXME: use hardware contexts to avoid 'losing' hardware after
+    * each buffer flush.
+    */
+   intel->vtbl.lost_hardware(intel);
+
+}
diff --git a/src/mesa/drivers/dri/i915/intel_ioctl.h b/src/mesa/drivers/dri/i915/intel_ioctl.h
index 7a5b175ed1..953fee9240 100644
--- a/src/mesa/drivers/dri/i915/intel_ioctl.h
+++ b/src/mesa/drivers/dri/i915/intel_ioctl.h
@@ -37,4 +37,8 @@ void intel_batch_ioctl(struct intel_context *intel,
                        GLuint start_offset,
                        GLuint used,
                        GLboolean ignore_cliprects, GLboolean allow_unlock);
+void intel_exec_ioctl(struct intel_context *intel,
+		      GLuint used,
+		      GLboolean ignore_cliprects, GLboolean allow_unlock,
+		      void *start, GLuint count, dri_fence **fence);
 #endif
diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
index 74f6b2d851..2c167a9ab7 100644
--- a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c
@@ -99,12 +99,29 @@ intel_miptree_create(struct intel_context *intel,
 
    if (ok) {
       if (!mt->compressed) {
-	 /* XXX: Align pitch to multiple of 64 bytes for now to allow
-	  * render-to-texture to work in all cases. This should probably be
-	  * replaced at some point by some scheme to only do this when really
-	  * necessary.
+	 int align;
+
+	 if (intel->intelScreen->ttm) {
+	    /* XXX: Align pitch to multiple of 64 bytes for now to allow
+	     * render-to-texture to work in all cases. This should probably be
+	     * replaced at some point by some scheme to only do this when really
+	     * necessary.
+	     */
+	    align = 63;
+	 } else {
+	    align = 3;
+	 }
+
+	 mt->pitch = (mt->pitch * cpp + align) & ~align;
+
+	 /* XXX: At least the i915 seems very upset when the pitch is a multiple
+	  * of 1024 and sometimes 512 bytes - performance can drop by several
+	  * times. Go to the next multiple of the required alignment for now.
 	  */
-	 mt->pitch = ((mt->pitch * cpp + 63) & ~63) / cpp;
+	 if (!(mt->pitch & 511))
+	    mt->pitch += align + 1;
+
+	 mt->pitch /= cpp;
       }
 
       mt->region = intel_region_alloc(intel->intelScreen,
diff --git a/src/mesa/drivers/dri/i915/intel_reg.h b/src/mesa/drivers/dri/i915/intel_reg.h
deleted file mode 100644
index 7828ba6ad3..0000000000
--- a/src/mesa/drivers/dri/i915/intel_reg.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/**************************************************************************
- * 
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
-
-#ifndef _INTEL_REG_H_
-#define _INTEL_REG_H_
-
-
-
-#define CMD_3D (0x3<<29)
-
-
-#define _3DPRIMITIVE         ((0x3<<29)|(0x1f<<24))
-#define PRIM_INDIRECT            (1<<23)
-#define PRIM_INLINE              (0<<23)
-#define PRIM_INDIRECT_SEQUENTIAL (0<<17)
-#define PRIM_INDIRECT_ELTS       (1<<17)
-
-#define PRIM3D_TRILIST		(0x0<<18)
-#define PRIM3D_TRISTRIP 	(0x1<<18)
-#define PRIM3D_TRISTRIP_RVRSE	(0x2<<18)
-#define PRIM3D_TRIFAN		(0x3<<18)
-#define PRIM3D_POLY		(0x4<<18)
-#define PRIM3D_LINELIST 	(0x5<<18)
-#define PRIM3D_LINESTRIP	(0x6<<18)
-#define PRIM3D_RECTLIST 	(0x7<<18)
-#define PRIM3D_POINTLIST	(0x8<<18)
-#define PRIM3D_DIB		(0x9<<18)
-#define PRIM3D_MASK		(0x1f<<18)
-
-#define I915PACKCOLOR4444(r,g,b,a) \
-  ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
-
-#define I915PACKCOLOR1555(r,g,b,a) \
-  ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
-    ((a) ? 0x8000 : 0))
-
-#define I915PACKCOLOR565(r,g,b) \
-  ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
-
-#define I915PACKCOLOR8888(r,g,b,a) \
-  ((a<<24) | (r<<16) | (g<<8) | b)
-
-
-
-
-#define BR00_BITBLT_CLIENT   0x40000000
-#define BR00_OP_COLOR_BLT    0x10000000
-#define BR00_OP_SRC_COPY_BLT 0x10C00000
-#define BR13_SOLID_PATTERN   0x80000000
-
-#define XY_COLOR_BLT_CMD		((2<<29)|(0x50<<22)|0x4)
-#define XY_COLOR_BLT_WRITE_ALPHA	(1<<21)
-#define XY_COLOR_BLT_WRITE_RGB		(1<<20)
-
-#define XY_SRC_COPY_BLT_CMD             ((2<<29)|(0x53<<22)|6)
-#define XY_SRC_COPY_BLT_WRITE_ALPHA     (1<<21)
-#define XY_SRC_COPY_BLT_WRITE_RGB       (1<<20)
-
-#define MI_WAIT_FOR_EVENT               ((0x3<<23))
-#define MI_WAIT_FOR_PLANE_B_FLIP        (1<<6)
-#define MI_WAIT_FOR_PLANE_A_FLIP        (1<<2)
-
-#endif
diff --git a/src/mesa/drivers/dri/i915/intel_regions.c b/src/mesa/drivers/dri/i915/intel_regions.c
index 4eac859a13..7799fdbb11 100644
--- a/src/mesa/drivers/dri/i915/intel_regions.c
+++ b/src/mesa/drivers/dri/i915/intel_regions.c
@@ -44,6 +44,7 @@
 #include "intel_blit.h"
 #include "intel_buffer_objects.h"
 #include "dri_bufmgr.h"
+#include "intel_bufmgr_ttm.h"
 #include "intel_batchbuffer.h"
 
 #define FILE_DEBUG_FLAG DEBUG_REGION
@@ -162,7 +163,7 @@ intel_region_create_static(intelScreenPrivate *intelScreen,
 
    if (intelScreen->ttm) {
       assert(bo_handle != -1);
-      region->buffer = dri_ttm_bo_create_from_handle(intelScreen->bufmgr,
+      region->buffer = intel_ttm_bo_create_from_handle(intelScreen->bufmgr,
 						     "static region",
 						     bo_handle);
    } else {
@@ -201,7 +202,7 @@ intel_region_update_static(intelScreenPrivate *intelScreen,
    dri_bo_unreference(region->buffer);
    if (intelScreen->ttm) {
       assert(bo_handle != -1);
-      region->buffer = dri_ttm_bo_create_from_handle(intelScreen->bufmgr,
+      region->buffer = intel_ttm_bo_create_from_handle(intelScreen->bufmgr,
 						     "static region",
 						     bo_handle);
    } else {
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
index 2721a90094..25f5efa7bc 100644
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -50,6 +50,8 @@
 #include "intel_regions.h"
 #include "intel_batchbuffer.h"
 
+#include "intel_bufmgr_ttm.h"
+
 PUBLIC const char __driConfigOptions[] =
    DRI_CONF_BEGIN DRI_CONF_SECTION_PERFORMANCE
    DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
@@ -65,6 +67,7 @@ PUBLIC const char __driConfigOptions[] =
 #endif /*USE_NEW_INTERFACE */
 
      extern const struct dri_extension card_extensions[];
+     extern const struct dri_extension ttm_extensions[];
 
 /**
  * Map all the memory regions described by the screen.
@@ -217,7 +220,7 @@ intel_recreate_static_regions(intelScreenPrivate *intelScreen)
    /* The rotated region is only used for old DDXes that didn't handle rotation
 \    * on their own.
     */
-   if (intelScreen->driScrnPriv->ddxMinor < 8) {
+   if (intelScreen->driScrnPriv->ddx_version.minor < 8) {
       intelScreen->rotated_region =
 	 intel_recreate_static(intelScreen,
 			       intelScreen->rotated_region,
@@ -377,7 +380,7 @@ intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
    intelScreen->back.handle = sarea->back_handle;
    intelScreen->back.size = sarea->back_size;
 
-   if (intelScreen->driScrnPriv->ddxMinor >= 8) {
+   if (intelScreen->driScrnPriv->ddx_version.minor >= 8) {
       intelScreen->third.offset = sarea->third_offset;
       intelScreen->third.pitch = sarea->pitch * intelScreen->cpp;
       intelScreen->third.handle = sarea->third_handle;
@@ -389,7 +392,7 @@ intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
    intelScreen->depth.handle = sarea->depth_handle;
    intelScreen->depth.size = sarea->depth_size;
 
-   if (intelScreen->driScrnPriv->ddxMinor >= 9) {
+   if (intelScreen->driScrnPriv->ddx_version.minor >= 9) {
       intelScreen->front.bo_handle = sarea->front_bo_handle;
       intelScreen->back.bo_handle = sarea->back_bo_handle;
       intelScreen->third.bo_handle = sarea->third_bo_handle;
@@ -419,19 +422,28 @@ intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
       intelPrintSAREA(sarea);
 }
 
+static const __DRItexOffsetExtension intelTexOffsetExtension = {
+   { __DRI_TEX_OFFSET },
+   intelSetTexOffset,
+};
 
-static GLboolean
-intelInitDriver(__DRIscreenPrivate * sPriv)
+static const __DRIextension *intelExtensions[] = {
+    &driReadDrawableExtension,
+    &driCopySubBufferExtension.base,
+    &driSwapControlExtension.base,
+    &driFrameTrackingExtension.base,
+    &driMediaStreamCounterExtension.base,
+    &intelTexOffsetExtension.base,
+    NULL
+};
+
+
+static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv)
 {
    intelScreenPrivate *intelScreen;
    I830DRIPtr gDRIPriv = (I830DRIPtr) sPriv->pDevPriv;
    drmI830Sarea *sarea;
 
-   PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
-      (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->
-                                      getProcAddress("glxEnableExtension"));
-   void *const psc = sPriv->psc->screenConfigs;
-
    if (sPriv->devPrivSize != sizeof(I830DRIRec)) {
       fprintf(stderr,
               "\nERROR!  sizeof(I830DRIRec) does not match passed size from device driver\n");
@@ -489,7 +501,7 @@ intelInitDriver(__DRIscreenPrivate * sPriv)
    if (0)
       intelPrintDRIInfo(intelScreen, sPriv, gDRIPriv);
 
-   intelScreen->drmMinor = sPriv->drmMinor;
+   intelScreen->drmMinor = sPriv->drm_version.minor;
 
    /* Determine if IRQs are active? */
    {
@@ -523,25 +535,21 @@ intelInitDriver(__DRIscreenPrivate * sPriv)
       }
    }
 
-   if (glx_enable_extension != NULL) {
-      (*glx_enable_extension) (psc, "GLX_SGI_swap_control");
-      (*glx_enable_extension) (psc, "GLX_SGI_video_sync");
-      (*glx_enable_extension) (psc, "GLX_MESA_swap_control");
-      (*glx_enable_extension) (psc, "GLX_MESA_swap_frame_usage");
-      (*glx_enable_extension) (psc, "GLX_SGI_make_current_read");
-   }
+   sPriv->extensions = intelExtensions;
 
    /* If we've got a new enough DDX that's initializing TTM and giving us
     * object handles for the shared buffers, use that.
     */
    intelScreen->ttm = GL_FALSE;
    if (getenv("INTEL_NO_TTM") == NULL &&
-       intelScreen->driScrnPriv->ddxMinor >= 9 &&
+       intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
+       intelScreen->drmMinor >= 11 &&
        intelScreen->front.bo_handle != -1) {
-      intelScreen->bufmgr = dri_bufmgr_ttm_init(sPriv->fd,
-						DRM_FENCE_TYPE_EXE,
-						DRM_FENCE_TYPE_EXE |
-						DRM_I915_FENCE_TYPE_RW);
+      intelScreen->bufmgr = intel_bufmgr_ttm_init(sPriv->fd,
+						  DRM_FENCE_TYPE_EXE,
+						  DRM_FENCE_TYPE_EXE |
+						  DRM_I915_FENCE_TYPE_RW,
+						  BATCH_SZ);
       if (intelScreen->bufmgr != NULL)
 	 intelScreen->ttm = GL_TRUE;
    }
@@ -772,7 +780,6 @@ intelCreateContext(const __GLcontextModes * mesaVis,
 
 
 static const struct __DriverAPIRec intelAPI = {
-   .InitDriver = intelInitDriver,
    .DestroyScreen = intelDestroyScreen,
    .CreateContext = intelCreateContext,
    .DestroyContext = intelDestroyContext,
@@ -783,6 +790,7 @@ static const struct __DriverAPIRec intelAPI = {
    .UnbindContext = intelUnbindContext,
    .GetSwapInfo = intelGetSwapInfo,
    .GetMSC = driGetMSC32,
+   .GetDrawableMSC = driDrawableGetMSC32,
    .WaitForMSC = driWaitForMSC32,
    .WaitForSBC = NULL,
    .SwapBuffersMSC = NULL,
@@ -877,65 +885,47 @@ intelFillInModes(unsigned pixel_bits, unsigned depth_bits,
 
 
 /**
- * This is the bootstrap function for the driver.  libGL supplies all of the
- * requisite information about the system, and the driver initializes itself.
- * This routine also fills in the linked list pointed to by \c driver_modes
- * with the \c __GLcontextModes that the driver can support for windows or
- * pbuffers.
+ * This is the driver specific part of the createNewScreen entry point.
  * 
- * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 
- *         failure.
+ * \todo maybe fold this into intelInitDriver
+ *
+ * \return the __GLcontextModes supported by this driver
  */
-PUBLIC void *
-__driCreateNewScreen_20050727(__DRInativeDisplay * dpy, int scrn,
-                              __DRIscreen * psc,
-                              const __GLcontextModes * modes,
-                              const __DRIversion * ddx_version,
-                              const __DRIversion * dri_version,
-                              const __DRIversion * drm_version,
-                              const __DRIframebuffer * frame_buffer,
-                              drmAddress pSAREA, int fd,
-                              int internal_api_version,
-                              const __DRIinterfaceMethods * interface,
-                              __GLcontextModes ** driver_modes)
+PUBLIC __GLcontextModes *__driDriverInitScreen(__DRIscreenPrivate *psp)
 {
-   __DRIscreenPrivate *psp;
    static const __DRIversion ddx_expected = { 1, 5, 0 };
    static const __DRIversion dri_expected = { 4, 0, 0 };
    static const __DRIversion drm_expected = { 1, 5, 0 };
+   I830DRIPtr dri_priv = (I830DRIPtr) psp->pDevPriv;
 
-   dri_interface = interface;
+   psp->DriverAPI = intelAPI;
 
    if (!driCheckDriDdxDrmVersions2("i915",
-                                   dri_version, &dri_expected,
-                                   ddx_version, &ddx_expected,
-                                   drm_version, &drm_expected)) {
+                                   &psp->dri_version, &dri_expected,
+                                   &psp->ddx_version, &ddx_expected,
+                                   &psp->drm_version, &drm_expected)) {
       return NULL;
    }
 
-   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
-                                  ddx_version, dri_version, drm_version,
-                                  frame_buffer, pSAREA, fd,
-                                  internal_api_version, &intelAPI);
-
-   if (psp != NULL) {
-      I830DRIPtr dri_priv = (I830DRIPtr) psp->pDevPriv;
-      *driver_modes = intelFillInModes(dri_priv->cpp * 8,
-                                       (dri_priv->cpp == 2) ? 16 : 24,
-                                       (dri_priv->cpp == 2) ? 0 : 8, 1);
-
-      /* Calling driInitExtensions here, with a NULL context pointer, does not actually
-       * enable the extensions.  It just makes sure that all the dispatch offsets for all
-       * the extensions that *might* be enables are known.  This is needed because the
-       * dispatch offsets need to be known when _mesa_context_create is called, but we can't
-       * enable the extensions until we have a context pointer.
-       *
-       * Hello chicken.  Hello egg.  How are you two today?
-       */
-      driInitExtensions(NULL, card_extensions, GL_FALSE);
-   }
+   /* Calling driInitExtensions here, with a NULL context pointer,
+    * does not actually enable the extensions.  It just makes sure
+    * that all the dispatch offsets for all the extensions that
+    * *might* be enables are known.  This is needed because the
+    * dispatch offsets need to be known when _mesa_context_create is
+    * called, but we can't enable the extensions until we have a
+    * context pointer.
+    *
+    * Hello chicken.  Hello egg.  How are you two today?
+    */
+   driInitExtensions(NULL, card_extensions, GL_FALSE);
+   driInitExtensions(NULL, ttm_extensions, GL_FALSE);
+
+   if (!intelInitDriver(psp))
+       return NULL;
 
-   return (void *) psp;
+   return intelFillInModes(dri_priv->cpp * 8,
+			   (dri_priv->cpp == 2) ? 16 : 24,
+			   (dri_priv->cpp == 2) ? 0  : 8, 1);
 }
 
 struct intel_context *intelScreenContext(intelScreenPrivate *intelScreen)
diff --git a/src/mesa/drivers/dri/i915/server/i830_common.h b/src/mesa/drivers/dri/i915/server/i830_common.h
deleted file mode 100644
index f1fd3939ab..0000000000
--- a/src/mesa/drivers/dri/i915/server/i830_common.h
+++ /dev/null
@@ -1,256 +0,0 @@
-/**************************************************************************
-
-Copyright 2001 VA Linux Systems Inc., Fremont, California.
-Copyright 2002 Tungsten Graphics Inc., Cedar Park, Texas.
-
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the "Software"),
-to deal in the Software without restriction, including without limitation
-on the rights to use, copy, modify, merge, publish, distribute, sub
-license, and/or sell copies of the Software, and to permit persons to whom
-the Software is furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice (including the next
-paragraph) shall be included in all copies or substantial portions of the
-Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
-DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h,v 1.1 2002/09/11 00:29:32 dawes Exp $ */
-
-#ifndef _I830_COMMON_H_
-#define _I830_COMMON_H_
-
-
-#define I830_NR_TEX_REGIONS 255	/* maximum due to use of chars for next/prev */
-#define I830_LOG_MIN_TEX_REGION_SIZE 14
-
-
-/* Driver specific DRM command indices
- * NOTE: these are not OS specific, but they are driver specific
- */
-#define DRM_I830_INIT                     0x00
-#define DRM_I830_FLUSH                    0x01
-#define DRM_I830_FLIP                     0x02
-#define DRM_I830_BATCHBUFFER              0x03
-#define DRM_I830_IRQ_EMIT                 0x04
-#define DRM_I830_IRQ_WAIT                 0x05
-#define DRM_I830_GETPARAM                 0x06
-#define DRM_I830_SETPARAM                 0x07
-#define DRM_I830_ALLOC                    0x08
-#define DRM_I830_FREE                     0x09
-#define DRM_I830_INIT_HEAP                0x0a
-#define DRM_I830_CMDBUFFER                0x0b
-#define DRM_I830_DESTROY_HEAP             0x0c
-#define DRM_I830_SET_VBLANK_PIPE          0x0d
-#define DRM_I830_GET_VBLANK_PIPE          0x0e
-#define DRM_I830_MMIO		       	  0x10
-
-typedef struct {
-   enum {
-      I830_INIT_DMA = 0x01,
-      I830_CLEANUP_DMA = 0x02,
-      I830_RESUME_DMA = 0x03
-   } func;
-   unsigned int mmio_offset;
-   int sarea_priv_offset;
-   unsigned int ring_start;
-   unsigned int ring_end;
-   unsigned int ring_size;
-   unsigned int front_offset;
-   unsigned int back_offset;
-   unsigned int depth_offset;
-   unsigned int w;
-   unsigned int h;
-   unsigned int pitch;
-   unsigned int pitch_bits;
-   unsigned int back_pitch;
-   unsigned int depth_pitch;
-   unsigned int cpp;
-   unsigned int chipset;
-} drmI830Init;
-
-typedef struct {
-	drmTextureRegion texList[I830_NR_TEX_REGIONS+1];
-        int last_upload;	/* last time texture was uploaded */
-        int last_enqueue;	/* last time a buffer was enqueued */
-	int last_dispatch;	/* age of the most recently dispatched buffer */
-	int ctxOwner;		/* last context to upload state */
-	/** Last context that used the buffer manager. */
-	int texAge;
-        int pf_enabled;		/* is pageflipping allowed? */
-        int pf_active;               
-        int pf_current_page;	/* which buffer is being displayed? */
-        int perf_boxes;	        /* performance boxes to be displayed */   
-	int width, height;      /* screen size in pixels */
-
-	drm_handle_t front_handle;
-	int front_offset;
-	int front_size;
-
-	drm_handle_t back_handle;
-	int back_offset;
-	int back_size;
-
-	drm_handle_t depth_handle;
-	int depth_offset;
-	int depth_size;
-
-	drm_handle_t tex_handle;
-	int tex_offset;
-	int tex_size;
-	int log_tex_granularity;
-	int pitch;
-	int rotation;           /* 0, 90, 180 or 270 */
-	int rotated_offset;
-	int rotated_size;
-	int rotated_pitch;
-	int virtualX, virtualY;
-
-	unsigned int front_tiled;
-	unsigned int back_tiled;
-	unsigned int depth_tiled;
-	unsigned int rotated_tiled;
-	unsigned int rotated2_tiled;
-
-	int planeA_x;
-	int planeA_y;
-	int planeA_w;
-	int planeA_h;
-	int planeB_x;
-	int planeB_y;
-	int planeB_w;
-	int planeB_h;
-
-	/* Triple buffering */
-	drm_handle_t third_handle;
-	int third_offset;
-	int third_size;
-	unsigned int third_tiled;
-
-	/* buffer object handles for the static buffers.  May change
-	 * over the lifetime of the client, though it doesn't in our current
-	 * implementation.
-	 */
-	unsigned int front_bo_handle;
-	unsigned int back_bo_handle;
-	unsigned int third_bo_handle;
-	unsigned int depth_bo_handle;
-} drmI830Sarea;
-
-/* Flags for perf_boxes
- */
-#define I830_BOX_RING_EMPTY    0x1 /* populated by kernel */
-#define I830_BOX_FLIP          0x2 /* populated by kernel */
-#define I830_BOX_WAIT          0x4 /* populated by kernel & client */
-#define I830_BOX_TEXTURE_LOAD  0x8 /* populated by kernel */
-#define I830_BOX_LOST_CONTEXT  0x10 /* populated by client */
-
-
-typedef struct {
-   	int start;		/* agp offset */
-	int used;		/* nr bytes in use */
-	int DR1;		/* hw flags for GFX_OP_DRAWRECT_INFO */
-        int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO*/
-	int num_cliprects;	/* mulitpass with multiple cliprects? */
-        drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
-} drmI830BatchBuffer;
-
-typedef struct {
-   	char *buf;		/* agp offset */
-	int sz; 		/* nr bytes in use */
-	int DR1;		/* hw flags for GFX_OP_DRAWRECT_INFO */
-        int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO*/
-	int num_cliprects;	/* mulitpass with multiple cliprects? */
-        drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
-} drmI830CmdBuffer;
- 
-typedef struct {
-	int *irq_seq;
-} drmI830IrqEmit;
-
-typedef struct {
-	int irq_seq;
-} drmI830IrqWait;
-
-typedef struct {
-	int param;
-	int *value;
-} drmI830GetParam;
-
-#define I830_PARAM_IRQ_ACTIVE     1
-#define I830_PARAM_ALLOW_BATCHBUFFER   2 
-
-typedef struct {
-	int param;
-	int value;
-} drmI830SetParam;
-
-#define I830_SETPARAM_USE_MI_BATCHBUFFER_START  1
-#define I830_SETPARAM_TEX_LRU_LOG_GRANULARITY   2
-#define I830_SETPARAM_ALLOW_BATCHBUFFER         3
-
-
-/* A memory manager for regions of shared memory:
- */
-#define I830_MEM_REGION_AGP 1
-
-typedef struct {
-	int region;
-	int alignment;
-	int size;
-	int *region_offset;	/* offset from start of fb or agp */
-} drmI830MemAlloc;
-
-typedef struct {
-	int region;
-	int region_offset;
-} drmI830MemFree;
-
-typedef struct {
-	int region;
-	int size;
-	int start;	
-} drmI830MemInitHeap;
-
-typedef struct {
-	int region;
-} drmI830MemDestroyHeap;
-
-#define DRM_I830_VBLANK_PIPE_A  1
-#define DRM_I830_VBLANK_PIPE_B  2
-
-typedef struct {
-        int pipe;
-} drmI830VBlankPipe;
-
-#define MMIO_READ  0
-#define MMIO_WRITE 1
-
-#define MMIO_REGS_IA_PRIMATIVES_COUNT           0
-#define MMIO_REGS_IA_VERTICES_COUNT             1
-#define MMIO_REGS_VS_INVOCATION_COUNT           2
-#define MMIO_REGS_GS_PRIMITIVES_COUNT           3
-#define MMIO_REGS_GS_INVOCATION_COUNT           4
-#define MMIO_REGS_CL_PRIMITIVES_COUNT           5
-#define MMIO_REGS_CL_INVOCATION_COUNT           6
-#define MMIO_REGS_PS_INVOCATION_COUNT           7
-#define MMIO_REGS_PS_DEPTH_COUNT                8
-
-typedef struct {
-        unsigned int read_write:1;
-        unsigned int reg:31;
-        void __user *data;
-} drmI830MMIO;
-
-#endif /* _I830_DRM_H_ */
diff --git a/src/mesa/drivers/dri/i915/server/i830_dri.h b/src/mesa/drivers/dri/i915/server/i830_dri.h
deleted file mode 100644
index c2a3af8cbf..0000000000
--- a/src/mesa/drivers/dri/i915/server/i830_dri.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h,v 1.4 2002/10/30 12:52:18 alanh Exp $ */
-
-#ifndef _I830_DRI_H
-#define _I830_DRI_H
-
-#include "xf86drm.h"
-#include "i830_common.h"
-
-#define I830_MAX_DRAWABLES 256
-
-#define I830_MAJOR_VERSION 1
-#define I830_MINOR_VERSION 7
-#define I830_PATCHLEVEL 2
-
-#define I830_REG_SIZE 0x80000
-
-typedef struct _I830DRIRec {
-   drm_handle_t regs;
-   drmSize regsSize;
-
-   drmSize unused1; /* backbufferSize */
-   drm_handle_t unused2; /* backbuffer */
-
-   drmSize unused3; /* depthbufferSize */
-   drm_handle_t unused4; /* depthbuffer */
-
-   drmSize unused5; /* rotatedSize */
-   drm_handle_t unused6; /* rotatedbuffer */
-
-   drm_handle_t unused7; /* textures */
-   int unused8; /* textureSize */
-
-   drm_handle_t unused9; /* agp_buffers */
-   drmSize unused10; /* agp_buf_size */
-
-   int deviceID;
-   int width;
-   int height;
-   int mem;
-   int cpp;
-   int bitsPerPixel;
-
-   int unused11[8]; /* was front/back/depth/rotated offset/pitch */
-   
-   int unused12; /* logTextureGranularity */
-   int unused13; /* textureOffset */
-
-   int irq;
-   int sarea_priv_offset;
-} I830DRIRec, *I830DRIPtr;
-
-typedef struct {
-   /* Nothing here yet */
-   int dummy;
-} I830ConfigPrivRec, *I830ConfigPrivPtr;
-
-typedef struct {
-   /* Nothing here yet */
-   int dummy;
-} I830DRIContextRec, *I830DRIContextPtr;
-
-
-#endif
diff --git a/src/mesa/drivers/dri/i915/server/intel.h b/src/mesa/drivers/dri/i915/server/intel.h
deleted file mode 100644
index 6ea72499c1..0000000000
--- a/src/mesa/drivers/dri/i915/server/intel.h
+++ /dev/null
@@ -1,331 +0,0 @@
-#ifndef _INTEL_H_
-#define _INTEL_H_
-
-#include "xf86drm.h"		/* drm_handle_t, etc */
-
-/* Intel */
-#ifndef PCI_CHIP_I810
-#define PCI_CHIP_I810              0x7121
-#define PCI_CHIP_I810_DC100        0x7123
-#define PCI_CHIP_I810_E            0x7125
-#define PCI_CHIP_I815              0x1132
-#define PCI_CHIP_I810_BRIDGE       0x7120
-#define PCI_CHIP_I810_DC100_BRIDGE 0x7122
-#define PCI_CHIP_I810_E_BRIDGE     0x7124
-#define PCI_CHIP_I815_BRIDGE       0x1130
-#endif
-
-#define PCI_CHIP_845_G			0x2562
-#define PCI_CHIP_I830_M			0x3577
-
-#ifndef PCI_CHIP_I855_GM
-#define PCI_CHIP_I855_GM	   0x3582
-#define PCI_CHIP_I855_GM_BRIDGE	   0x3580
-#endif
-
-#ifndef PCI_CHIP_I865_G
-#define PCI_CHIP_I865_G		   0x2572
-#define PCI_CHIP_I865_G_BRIDGE	   0x2570
-#endif
-
-#ifndef PCI_CHIP_I915_G
-#define PCI_CHIP_I915_G		   0x2582
-#define PCI_CHIP_I915_G_BRIDGE	   0x2580
-#endif
-
-#ifndef PCI_CHIP_I915_GM
-#define PCI_CHIP_I915_GM	   0x2592
-#define PCI_CHIP_I915_GM_BRIDGE	   0x2590
-#endif
-
-#ifndef PCI_CHIP_E7221_G
-#define PCI_CHIP_E7221_G	   0x258A
-/* Same as I915_G_BRIDGE */
-#define PCI_CHIP_E7221_G_BRIDGE	   0x2580
-#endif
-
-#ifndef PCI_CHIP_I945_G
-#define PCI_CHIP_I945_G        0x2772
-#define PCI_CHIP_I945_G_BRIDGE 0x2770
-#endif
-
-#ifndef PCI_CHIP_I945_GM
-#define PCI_CHIP_I945_GM        0x27A2
-#define PCI_CHIP_I945_GM_BRIDGE 0x27A0
-#endif
-
-#define IS_I810(pI810) (pI810->Chipset == PCI_CHIP_I810 ||	\
-			pI810->Chipset == PCI_CHIP_I810_DC100 || \
-			pI810->Chipset == PCI_CHIP_I810_E)
-#define IS_I815(pI810) (pI810->Chipset == PCI_CHIP_I815)
-#define IS_I830(pI810) (pI810->Chipset == PCI_CHIP_I830_M)
-#define IS_845G(pI810) (pI810->Chipset == PCI_CHIP_845_G)
-#define IS_I85X(pI810)  (pI810->Chipset == PCI_CHIP_I855_GM)
-#define IS_I852(pI810)  (pI810->Chipset == PCI_CHIP_I855_GM && (pI810->variant == I852_GM || pI810->variant == I852_GME))
-#define IS_I855(pI810)  (pI810->Chipset == PCI_CHIP_I855_GM && (pI810->variant == I855_GM || pI810->variant == I855_GME))
-#define IS_I865G(pI810) (pI810->Chipset == PCI_CHIP_I865_G)
-
-#define IS_I915G(pI810) (pI810->Chipset == PCI_CHIP_I915_G || pI810->Chipset == PCI_CHIP_E7221_G)
-#define IS_I915GM(pI810) (pI810->Chipset == PCI_CHIP_I915_GM)
-#define IS_I945G(pI810) (pI810->Chipset == PCI_CHIP_I945_G)
-#define IS_I945GM(pI810) (pI810->Chipset == PCI_CHIP_I945_GM)
-#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810))
-
-#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810))
-
-#define I830_GMCH_CTRL		0x52
-
-#define I830_GMCH_MEM_MASK      0x1
-#define I830_GMCH_MEM_64M       0x1
-#define I830_GMCH_MEM_128M      0
-
-#define I830_GMCH_GMS_MASK			0x70
-#define I830_GMCH_GMS_DISABLED		0x00
-#define I830_GMCH_GMS_LOCAL			0x10
-#define I830_GMCH_GMS_STOLEN_512	0x20
-#define I830_GMCH_GMS_STOLEN_1024	0x30
-#define I830_GMCH_GMS_STOLEN_8192	0x40
-
-#define I855_GMCH_GMS_MASK			(0x7 << 4)
-#define I855_GMCH_GMS_DISABLED			0x00
-#define I855_GMCH_GMS_STOLEN_1M			(0x1 << 4)
-#define I855_GMCH_GMS_STOLEN_4M			(0x2 << 4)
-#define I855_GMCH_GMS_STOLEN_8M			(0x3 << 4)
-#define I855_GMCH_GMS_STOLEN_16M		(0x4 << 4)
-#define I855_GMCH_GMS_STOLEN_32M		(0x5 << 4)
-#define I915G_GMCH_GMS_STOLEN_48M		(0x6 << 4)
-#define I915G_GMCH_GMS_STOLEN_64M		(0x7 << 4)
-
-typedef unsigned char Bool;
-#define TRUE 1
-#define FALSE 0
-
-#define PIPE_NONE	0<<0
-#define PIPE_CRT	1<<0
-#define PIPE_TV		1<<1
-#define PIPE_DFP	1<<2
-#define PIPE_LFP	1<<3
-#define PIPE_CRT2	1<<4
-#define PIPE_TV2	1<<5
-#define PIPE_DFP2	1<<6
-#define PIPE_LFP2	1<<7
-
-typedef struct _I830MemPool *I830MemPoolPtr;
-typedef struct _I830MemRange *I830MemRangePtr;
-typedef struct _I830MemRange {
-   long Start;
-   long End;
-   long Size;
-   unsigned long Physical;
-   unsigned long Offset;		/* Offset of AGP-allocated portion */
-   unsigned long Alignment;
-   drm_handle_t Key;
-   unsigned long Pitch; // add pitch
-   I830MemPoolPtr Pool;
-} I830MemRange;
-
-typedef struct _I830MemPool {
-   I830MemRange Total;
-   I830MemRange Free;
-   I830MemRange Fixed;
-   I830MemRange Allocated;
-} I830MemPool;
-
-typedef struct {
-   int tail_mask;
-   I830MemRange mem;
-   unsigned char *virtual_start;
-   int head;
-   int tail;
-   int space;
-} I830RingBuffer;
-
-typedef struct _I830Rec {
-   unsigned char *MMIOBase;
-   unsigned char *FbBase;
-   int cpp;
-   uint32_t aper_size;
-   unsigned int bios_version;
-
-   /* These are set in PreInit and never changed. */
-   long FbMapSize;
-   long TotalVideoRam;
-   I830MemRange StolenMemory;		/* pre-allocated memory */
-   long BIOSMemorySize;			/* min stolen pool size */
-   int BIOSMemSizeLoc;
-
-   /* These change according to what has been allocated. */
-   long FreeMemory;
-   I830MemRange MemoryAperture;
-   I830MemPool StolenPool;
-   long allocatedMemory;
-
-   /* Regions allocated either from the above pools, or from agpgart. */
-   /* for single and dual head configurations */
-   I830MemRange FrontBuffer;
-   I830MemRange FrontBuffer2;
-   I830MemRange Scratch;
-   I830MemRange Scratch2;
-
-   I830RingBuffer *LpRing;
-
-   I830MemRange BackBuffer;
-   I830MemRange DepthBuffer;
-   I830MemRange TexMem;
-   int TexGranularity;
-   I830MemRange ContextMem;
-   int drmMinor;
-   Bool have3DWindows;
-
-   Bool NeedRingBufferLow;
-   Bool allowPageFlip;
-   Bool disableTiling;
-
-   int Chipset;
-   unsigned long LinearAddr;
-   unsigned long MMIOAddr;
-
-   drmSize           registerSize;     /**< \brief MMIO register map size */
-   drm_handle_t         registerHandle;   /**< \brief MMIO register map handle */
-  //   IOADDRESS ioBase;
-   int               irq;              /**< \brief IRQ number */
-   int GttBound;
-
-   drm_handle_t ring_map;
-   unsigned int Fence[8];
-
-} I830Rec;
-
-/*
- * 12288 is set as the maximum, chosen because it is enough for
- * 1920x1440@32bpp with a 2048 pixel line pitch with some to spare.
- */
-#define I830_MAXIMUM_VBIOS_MEM		12288
-#define I830_DEFAULT_VIDEOMEM_2D	(MB(32) / 1024)
-#define I830_DEFAULT_VIDEOMEM_3D	(MB(64) / 1024)
-
-/* Flags for memory allocation function */
-#define FROM_ANYWHERE			0x00000000
-#define FROM_POOL_ONLY			0x00000001
-#define FROM_NEW_ONLY			0x00000002
-#define FROM_MASK			0x0000000f
-
-#define ALLOCATE_AT_TOP			0x00000010
-#define ALLOCATE_AT_BOTTOM		0x00000020
-#define FORCE_GAPS			0x00000040
-
-#define NEED_PHYSICAL_ADDR		0x00000100
-#define ALIGN_BOTH_ENDS			0x00000200
-#define FORCE_LOW			0x00000400
-
-#define ALLOC_NO_TILING			0x00001000
-#define ALLOC_INITIAL			0x00002000
-
-#define ALLOCATE_DRY_RUN		0x80000000
-
-/* Chipset registers for VIDEO BIOS memory RW access */
-#define _855_DRAM_RW_CONTROL 0x58
-#define _845_DRAM_RW_CONTROL 0x90
-#define DRAM_WRITE    0x33330000
-
-#define KB(x) ((x) * 1024)
-#define MB(x) ((x) * KB(1024))
-
-#define GTT_PAGE_SIZE			KB(4)
-#define ROUND_TO(x, y)			(((x) + (y) - 1) / (y) * (y))
-#define ROUND_DOWN_TO(x, y)		((x) / (y) * (y))
-#define ROUND_TO_PAGE(x)		ROUND_TO((x), GTT_PAGE_SIZE)
-#define ROUND_TO_MB(x)			ROUND_TO((x), MB(1))
-#define PRIMARY_RINGBUFFER_SIZE		KB(128)
-
-
-/* Ring buffer registers, p277, overview p19
- */
-#define LP_RING     0x2030
-#define HP_RING     0x2040
-
-#define RING_TAIL      0x00
-#define TAIL_ADDR           0x000FFFF8
-#define I830_TAIL_MASK	    0x001FFFF8
-
-#define RING_HEAD      0x04
-#define HEAD_WRAP_COUNT     0xFFE00000
-#define HEAD_WRAP_ONE       0x00200000
-#define HEAD_ADDR           0x001FFFFC
-#define I830_HEAD_MASK      0x001FFFFC
-
-#define RING_START     0x08
-#define START_ADDR          0x03FFFFF8
-#define I830_RING_START_MASK	0xFFFFF000
-
-#define RING_LEN       0x0C
-#define RING_NR_PAGES       0x001FF000 
-#define I830_RING_NR_PAGES	0x001FF000
-#define RING_REPORT_MASK    0x00000006
-#define RING_REPORT_64K     0x00000002
-#define RING_REPORT_128K    0x00000004
-#define RING_NO_REPORT      0x00000000
-#define RING_VALID_MASK     0x00000001
-#define RING_VALID          0x00000001
-#define RING_INVALID        0x00000000
-
-
-/* Fence/Tiling ranges [0..7]
- */
-#define FENCE            0x2000
-#define FENCE_NR         8
-
-#define I915G_FENCE_START_MASK	0x0ff00000
-
-#define I830_FENCE_START_MASK	0x07f80000
-
-#define FENCE_START_MASK    0x03F80000
-#define FENCE_X_MAJOR       0x00000000
-#define FENCE_Y_MAJOR       0x00001000
-#define FENCE_SIZE_MASK     0x00000700
-#define FENCE_SIZE_512K     0x00000000
-#define FENCE_SIZE_1M       0x00000100
-#define FENCE_SIZE_2M       0x00000200
-#define FENCE_SIZE_4M       0x00000300
-#define FENCE_SIZE_8M       0x00000400
-#define FENCE_SIZE_16M      0x00000500
-#define FENCE_SIZE_32M      0x00000600
-#define FENCE_SIZE_64M	    0x00000700
-#define I915G_FENCE_SIZE_1M       0x00000000
-#define I915G_FENCE_SIZE_2M       0x00000100
-#define I915G_FENCE_SIZE_4M       0x00000200
-#define I915G_FENCE_SIZE_8M       0x00000300
-#define I915G_FENCE_SIZE_16M      0x00000400
-#define I915G_FENCE_SIZE_32M      0x00000500
-#define I915G_FENCE_SIZE_64M	0x00000600
-#define I915G_FENCE_SIZE_128M	0x00000700
-#define FENCE_PITCH_1       0x00000000
-#define FENCE_PITCH_2       0x00000010
-#define FENCE_PITCH_4       0x00000020
-#define FENCE_PITCH_8       0x00000030
-#define FENCE_PITCH_16      0x00000040
-#define FENCE_PITCH_32      0x00000050
-#define FENCE_PITCH_64	    0x00000060
-#define FENCE_VALID         0x00000001
-
-#include <mmio.h>
-
-#  define MMIO_IN8(base, offset) \
-	*(volatile unsigned char *)(((unsigned char*)(base)) + (offset))
-#  define MMIO_IN32(base, offset) \
-	read_MMIO_LE32(base, offset)
-#  define MMIO_OUT8(base, offset, val) \
-	*(volatile unsigned char *)(((unsigned char*)(base)) + (offset)) = (val)
-#  define MMIO_OUT32(base, offset, val) \
-	*(volatile unsigned int *)(void *)(((unsigned char*)(base)) + (offset)) = CPU_TO_LE32(val)
-
-
-				/* Memory mapped register access macros */
-#define INREG8(addr)        MMIO_IN8(MMIO, addr)
-#define INREG(addr)         MMIO_IN32(MMIO, addr)
-#define OUTREG8(addr, val)  MMIO_OUT8(MMIO, addr, val)
-#define OUTREG(addr, val)   MMIO_OUT32(MMIO, addr, val)
-
-#define DSPABASE		0x70184
-
-#endif
diff --git a/src/mesa/drivers/dri/i915/server/intel_dri.c b/src/mesa/drivers/dri/i915/server/intel_dri.c
index e49c4214ad..a2043afb47 100644..120000
--- a/src/mesa/drivers/dri/i915/server/intel_dri.c
+++ b/src/mesa/drivers/dri/i915/server/intel_dri.c
@@ -1,1306 +1 @@
-/**
- * \file server/intel_dri.c
- * \brief File to perform the device-specific initialization tasks typically
- * done in the X server.
- *
- * Here they are converted to run in the client (or perhaps a standalone
- * process), and to work with the frame buffer device rather than the X
- * server infrastructure.
- * 
- * Copyright (C) 2006 Dave Airlie (airlied@linux.ie)
-
- Permission is hereby granted, free of charge, to any person obtaining a
- copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sub license, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
- 
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial portions
- of the Software.
- 
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR
- ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <unistd.h>
-
-#include "driver.h"
-#include "drm.h"
-
-#include "intel.h"
-#include "i830_dri.h"
-
-#include "memops.h"
-#include "pciaccess.h"
-
-static size_t drm_page_size;
-static int nextTile = 0;
-#define xf86DrvMsg(...) do {} while(0)
-
-static const int pitches[] = {
-  128 * 8,
-  128 * 16,
-  128 * 32,
-  128 * 64,
-  0
-};
-
-static Bool I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea);
-
-static unsigned long
-GetBestTileAlignment(unsigned long size)
-{
-   unsigned long i;
-
-   for (i = KB(512); i < size; i <<= 1)
-      ;
-
-   if (i > MB(64))
-      i = MB(64);
-
-   return i;
-}
-
-static void SetFenceRegs(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  int i;
-  unsigned char *MMIO = ctx->MMIOAddress;
-
-  for (i = 0; i < 8; i++) {
-    OUTREG(FENCE + i * 4, pI830->Fence[i]);
-    //    if (I810_DEBUG & DEBUG_VERBOSE_VGA)
-    fprintf(stderr,"Fence Register : %x\n", pI830->Fence[i]);
-  }
-}
-
-/* Tiled memory is good... really, really good...
- *
- * Need to make it less likely that we miss out on this - probably
- * need to move the frontbuffer away from the 'guarenteed' alignment
- * of the first memory segment, or perhaps allocate a discontigous
- * framebuffer to get more alignment 'sweet spots'.
- */
-static void
-SetFence(const DRIDriverContext *ctx, I830Rec *pI830,
-	 int nr, unsigned int start, unsigned int pitch,
-         unsigned int size)
-{
-   unsigned int val;
-   unsigned int fence_mask = 0;
-   unsigned int fence_pitch;
-
-   if (nr < 0 || nr > 7) {
-      fprintf(stderr,
-		 "SetFence: fence %d out of range\n",nr);
-      return;
-   }
-
-   pI830->Fence[nr] = 0;
-
-   if (IS_I9XX(pI830))
-   	fence_mask = ~I915G_FENCE_START_MASK;
-   else
-   	fence_mask = ~I830_FENCE_START_MASK;
-
-   if (start & fence_mask) {
-      fprintf(stderr,
-		 "SetFence: %d: start (0x%08x) is not %s aligned\n",
-		 nr, start, (IS_I9XX(pI830)) ? "1MB" : "512k");
-      return;
-   }
-
-   if (start % size) {
-      fprintf(stderr,
-		 "SetFence: %d: start (0x%08x) is not size (%dk) aligned\n",
-		 nr, start, size / 1024);
-      return;
-   }
-
-   if (pitch & 127) {
-      fprintf(stderr,
-		 "SetFence: %d: pitch (%d) not a multiple of 128 bytes\n",
-		 nr, pitch);
-      return;
-   }
-
-   val = (start | FENCE_X_MAJOR | FENCE_VALID);
-
-   if (IS_I9XX(pI830)) {
-   	switch (size) {
-	   case MB(1):
-      		val |= I915G_FENCE_SIZE_1M;
-      		break;
-   	   case MB(2):
-      		val |= I915G_FENCE_SIZE_2M;
-      		break;
-   	   case MB(4):
-      		val |= I915G_FENCE_SIZE_4M;
-      		break;
-   	   case MB(8):
-      		val |= I915G_FENCE_SIZE_8M;
-      		break;
-   	   case MB(16):
-      		val |= I915G_FENCE_SIZE_16M;
-      		break;
-   	   case MB(32):
-      		val |= I915G_FENCE_SIZE_32M;
-      		break;
-   	   case MB(64):
-      		val |= I915G_FENCE_SIZE_64M;
-      		break;
-   	   default:
-      		fprintf(stderr,
-		 "SetFence: %d: illegal size (%d kByte)\n", nr, size / 1024);
-      		return;
-   	}
-    } else {
-   	switch (size) {
-	   case KB(512):
-      		val |= FENCE_SIZE_512K;
-      		break;
-	   case MB(1):
-      		val |= FENCE_SIZE_1M;
-      		break;
-   	   case MB(2):
-      		val |= FENCE_SIZE_2M;
-      		break;
-   	   case MB(4):
-      		val |= FENCE_SIZE_4M;
-      		break;
-   	   case MB(8):
-      		val |= FENCE_SIZE_8M;
-      		break;
-   	   case MB(16):
-      		val |= FENCE_SIZE_16M;
-      		break;
-   	   case MB(32):
-      		val |= FENCE_SIZE_32M;
-      		break;
-   	   case MB(64):
-      		val |= FENCE_SIZE_64M;
-      		break;
-   	   default:
-      		fprintf(stderr,
-		 "SetFence: %d: illegal size (%d kByte)\n", nr, size / 1024);
-      		return;
-   	}
-   }
-
-   if (IS_I9XX(pI830))
-	fence_pitch = pitch / 512;
-   else
-	fence_pitch = pitch / 128;
-
-   switch (fence_pitch) {
-   case 1:
-      val |= FENCE_PITCH_1;
-      break;
-   case 2:
-      val |= FENCE_PITCH_2;
-      break;
-   case 4:
-      val |= FENCE_PITCH_4;
-      break;
-   case 8:
-      val |= FENCE_PITCH_8;
-      break;
-   case 16:
-      val |= FENCE_PITCH_16;
-      break;
-   case 32:
-      val |= FENCE_PITCH_32;
-      break;
-   case 64:
-      val |= FENCE_PITCH_64;
-      break;
-   default:
-      fprintf(stderr,
-		 "SetFence: %d: illegal pitch (%d)\n", nr, pitch);
-      return;
-   }
-
-   pI830->Fence[nr] = val;
-}
-
-static Bool
-MakeTiles(const DRIDriverContext *ctx, I830Rec *pI830, I830MemRange *pMem)
-{
-   int pitch, ntiles, i;
-
-   pitch = pMem->Pitch * ctx->cpp;
-   /*
-    * Simply try to break the region up into at most four pieces of size
-    * equal to the alignment.
-    */
-   ntiles = ROUND_TO(pMem->Size, pMem->Alignment) / pMem->Alignment;
-   if (ntiles >= 4) {
-      return FALSE;
-   }
-
-   for (i = 0; i < ntiles; i++, nextTile++) {
-     SetFence(ctx, pI830, nextTile, pMem->Start + i * pMem->Alignment,
-	       pitch, pMem->Alignment);
-   }
-   return TRUE;
-}
-
-static void I830SetupMemoryTiling(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  int i;
-
-  /* Clear out */
-  for (i = 0; i < 8; i++)
-    pI830->Fence[i] = 0;
-  
-  nextTile = 0;
-
-  if (pI830->BackBuffer.Alignment >= KB(512)) {
-    if (MakeTiles(ctx, pI830, &(pI830->BackBuffer))) {
-      fprintf(stderr,
-		 "Activating tiled memory for the back buffer.\n");
-    } else {
-      fprintf(stderr,
-		 "MakeTiles failed for the back buffer.\n");
-      pI830->allowPageFlip = FALSE;
-    }
-  }
-  
-  if (pI830->DepthBuffer.Alignment >= KB(512)) {
-    if (MakeTiles(ctx, pI830, &(pI830->DepthBuffer))) {
-      fprintf(stderr,
-		 "Activating tiled memory for the depth buffer.\n");
-    } else {
-      fprintf(stderr,
-		 "MakeTiles failed for the depth buffer.\n");
-    }
-  }
-
-  return;
-}
-
-static int I830DetectMemory(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  struct pci_device host_bridge, ig_dev;
-  uint32_t gmch_ctrl;
-  int memsize = 0;
-  int range;
-  uint32_t aper_size;
-  uint32_t membase2 = 0;
-      
-  memset(&host_bridge, 0, sizeof(host_bridge));
-  memset(&ig_dev, 0, sizeof(ig_dev));
-
-  ig_dev.dev = 2;
-
-  pci_device_cfg_read_u32(&host_bridge, &gmch_ctrl, I830_GMCH_CTRL);
-
-  if (IS_I830(pI830) || IS_845G(pI830)) {
-    if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
-      aper_size = 0x80000000;
-    } else {
-      aper_size = 0x40000000;
-    }
-  } else {
-    if (IS_I9XX(pI830)) {
-      int ret;
-      ret = pci_device_cfg_read_u32(&ig_dev, &membase2, 0x18);
-      if (membase2 & 0x08000000)
-	aper_size = 0x8000000;
-      else
-	aper_size = 0x10000000;
-
-      fprintf(stderr,"aper size is %08X %08x %d\n", aper_size, membase2, ret);
-    } else
-      aper_size = 0x8000000;
-  }
-
-  pI830->aper_size = aper_size;
-
-
-  /* We need to reduce the stolen size, by the GTT and the popup.
-   * The GTT varying according the the FbMapSize and the popup is 4KB */
-  range = (ctx->shared.fbSize / (1024*1024)) + 4;
-
-   if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) {
-      switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
-      case I855_GMCH_GMS_STOLEN_1M:
-	 memsize = MB(1) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_4M:
-	 memsize = MB(4) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_8M:
-	 memsize = MB(8) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_16M:
-	 memsize = MB(16) - KB(range);
-	 break;
-      case I855_GMCH_GMS_STOLEN_32M:
-	 memsize = MB(32) - KB(range);
-	 break;
-      case I915G_GMCH_GMS_STOLEN_48M:
-	 if (IS_I9XX(pI830))
-	    memsize = MB(48) - KB(range);
-	 break;
-      case I915G_GMCH_GMS_STOLEN_64M:
-	 if (IS_I9XX(pI830))
-	    memsize = MB(64) - KB(range);
-	 break;
-      }
-   } else {
-      switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
-      case I830_GMCH_GMS_STOLEN_512:
-	 memsize = KB(512) - KB(range);
-	 break;
-      case I830_GMCH_GMS_STOLEN_1024:
-	 memsize = MB(1) - KB(range);
-	 break;
-      case I830_GMCH_GMS_STOLEN_8192:
-	 memsize = MB(8) - KB(range);
-	 break;
-      case I830_GMCH_GMS_LOCAL:
-	 memsize = 0;
-	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		    "Local memory found, but won't be used.\n");
-	 break;
-      }
-   }
-   if (memsize > 0) {
-     fprintf(stderr,
-		 "detected %d kB stolen memory.\n", memsize / 1024);
-   } else {
-     fprintf(stderr,
-		 "no video memory detected.\n");
-   }
-   return memsize;
-}
-
-static int AgpInit(const DRIDriverContext *ctx, I830Rec *info)
-{
-  unsigned long mode = 0x4;
-
-  if (drmAgpAcquire(ctx->drmFD) < 0) {
-    fprintf(stderr, "[gart] AGP not available\n");
-    return 0;
-  }
-  
-  if (drmAgpEnable(ctx->drmFD, mode) < 0) {
-    fprintf(stderr, "[gart] AGP not enabled\n");
-    drmAgpRelease(ctx->drmFD);
-    return 0;
-  }
-  else
-    fprintf(stderr, "[gart] AGP enabled at %dx\n", ctx->agpmode);
-
-  return 1;
-}
-
-/*
- * Allocate memory from the given pool.  Grow the pool if needed and if
- * possible.
- */
-static unsigned long
-AllocFromPool(const DRIDriverContext *ctx, I830Rec *pI830, 
-	      I830MemRange *result, I830MemPool *pool,
-	      long size, unsigned long alignment, int flags)
-{
-   long needed, start, end;
-
-   if (!result || !pool || !size)
-      return 0;
-
-   /* Calculate how much space is needed. */
-   if (alignment <= GTT_PAGE_SIZE)
-      needed = size;
-   else {
-	 start = ROUND_TO(pool->Free.Start, alignment);
-	 end = ROUND_TO(start + size, alignment);
-	 needed = end - pool->Free.Start;
-   }
-   if (needed > pool->Free.Size) {
-     return 0;
-   }
-
-   result->Start = ROUND_TO(pool->Free.Start, alignment);
-   pool->Free.Start += needed;
-   result->End = pool->Free.Start;
-
-   pool->Free.Size = pool->Free.End - pool->Free.Start;
-   result->Size = result->End - result->Start;
-   result->Pool = pool;
-   result->Alignment = alignment;
-   return needed;
-}
-
-static unsigned long AllocFromAGP(const DRIDriverContext *ctx, I830Rec *pI830, long size, unsigned long alignment, I830MemRange  *result)
-{
-   unsigned long start, end;
-   unsigned long newApStart, newApEnd;
-   int ret;
-   if (!result || !size)
-      return 0;
-   
-   if (!alignment)
-     alignment = 4;
-
-   start = ROUND_TO(pI830->MemoryAperture.Start, alignment);
-   end = ROUND_TO(start + size, alignment);
-   newApStart = end;
-   newApEnd = pI830->MemoryAperture.End;
-
-   ret=drmAgpAlloc(ctx->drmFD, size, 0, &(result->Physical), (drm_handle_t *)&(result->Key));
-   
-   if (ret)
-   {
-     fprintf(stderr,"drmAgpAlloc failed %d\n", ret);
-     return 0;
-   }
-   pI830->allocatedMemory += size;
-   pI830->MemoryAperture.Start = newApStart;
-   pI830->MemoryAperture.End = newApEnd;
-   pI830->MemoryAperture.Size = newApEnd - newApStart;
-   //   pI830->FreeMemory -= size;
-   result->Start = start;
-   result->End = start + size;
-   result->Size = size;
-   result->Offset = start;
-   result->Alignment = alignment;
-   result->Pool = NULL;
-  
-   return size;
-}
-
-unsigned long
-I830AllocVidMem(const DRIDriverContext *ctx, I830Rec *pI830,
-                I830MemRange *result, I830MemPool *pool, long size,
-                unsigned long alignment, int flags)
-{
-   unsigned long ret;
-
-   if (!result)
-      return 0;
-
-   /* Make sure these are initialised. */
-   result->Size = 0;
-   result->Key = -1;
-
-   if (!size) {
-      return 0;
-   }
-
-   if (pool->Free.Size < size) {
-      ret = AllocFromAGP(ctx, pI830, size, alignment, result);
-   }
-   else {
-      ret = AllocFromPool(ctx, pI830, result, pool, size, alignment, flags);
-      if (ret == 0)
-         ret = AllocFromAGP(ctx, pI830, size, alignment, result);
-   }
-   return ret;
-}
-
-static Bool BindAgpRange(const DRIDriverContext *ctx, I830MemRange *mem)
-{
-  if (!mem)
-    return FALSE;
-  
-  if (mem->Key == -1)
-    return TRUE;
-
-  return !drmAgpBind(ctx->drmFD, mem->Key, mem->Offset);
-}
-
-/* simple memory allocation routines needed */
-/* put ring buffer in low memory */
-/* need to allocate front, back, depth buffers aligned correctly,
-   allocate ring buffer, 
-*/
-
-/* */
-static Bool
-I830AllocateMemory(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  unsigned long size, ret;
-  unsigned long lines, lineSize, align;
-
-  /* allocate ring buffer */
-  memset(pI830->LpRing, 0, sizeof(I830RingBuffer));
-  pI830->LpRing->mem.Key = -1;
-
-  size = PRIMARY_RINGBUFFER_SIZE;
-  
-  ret = I830AllocVidMem(ctx, pI830, &pI830->LpRing->mem, &pI830->StolenPool, size, 0x1000, 0);
-  
-  if (ret != size)
-  {
-    fprintf(stderr,"unable to allocate ring buffer %ld\n", ret);
-    return FALSE;
-  }
-
-  pI830->LpRing->tail_mask = pI830->LpRing->mem.Size - 1;
-
-  
-  /* allocate front buffer */
-  memset(&(pI830->FrontBuffer), 0, sizeof(pI830->FrontBuffer));
-  pI830->FrontBuffer.Key = -1;
-  pI830->FrontBuffer.Pitch = ctx->shared.virtualWidth;
-
-  align = KB(512);  
-
-  lineSize = ctx->shared.virtualWidth * ctx->cpp;
-  lines = (ctx->shared.virtualHeight + 15) / 16 * 16;
-  size = lineSize * lines;
-  size = ROUND_TO_PAGE(size);
-
-  align = GetBestTileAlignment(size);
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->FrontBuffer, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate front buffer %ld\n", ret);
-    return FALSE;
-  }
-
-  memset(&(pI830->BackBuffer), 0, sizeof(pI830->BackBuffer));
-  pI830->BackBuffer.Key = -1;
-  pI830->BackBuffer.Pitch = ctx->shared.virtualWidth;
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->BackBuffer, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate back buffer %ld\n", ret);
-    return FALSE;
-  }
-  
-  memset(&(pI830->DepthBuffer), 0, sizeof(pI830->DepthBuffer));
-  pI830->DepthBuffer.Key = -1;
-  pI830->DepthBuffer.Pitch = ctx->shared.virtualWidth;
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->DepthBuffer, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate depth buffer %ld\n", ret);
-    return FALSE;
-  }
-
-  memset(&(pI830->ContextMem), 0, sizeof(pI830->ContextMem));
-  pI830->ContextMem.Key = -1;
-  size = KB(32);
-
-  ret = I830AllocVidMem(ctx, pI830, &pI830->ContextMem, &pI830->StolenPool, size, align, 0);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate context buffer %ld\n", ret);
-    return FALSE;
-  }
-
-#if 0  
-  memset(&(pI830->TexMem), 0, sizeof(pI830->TexMem));
-  pI830->TexMem.Key = -1;
-
-  size = 32768 * 1024;
-  ret = AllocFromAGP(ctx, pI830, size, align, &pI830->TexMem);
-  if (ret < size)
-  {
-    fprintf(stderr,"unable to allocate texture memory %ld\n", ret);
-    return FALSE;
-  }
-#endif
-
-  return TRUE;
-}
-
-static Bool
-I830BindMemory(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  if (!BindAgpRange(ctx, &pI830->LpRing->mem))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->FrontBuffer))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->BackBuffer))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->DepthBuffer))
-    return FALSE;
-  if (!BindAgpRange(ctx, &pI830->ContextMem))
-    return FALSE;
-#if 0
-  if (!BindAgpRange(ctx, &pI830->TexMem))
-    return FALSE;
-#endif
-  return TRUE;
-}
-
-static void SetupDRIMM(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  unsigned long aperEnd = ROUND_DOWN_TO(pI830->aper_size, GTT_PAGE_SIZE) / GTT_PAGE_SIZE;
-  unsigned long aperStart = ROUND_TO(pI830->aper_size - KB(32768), GTT_PAGE_SIZE) / GTT_PAGE_SIZE;
-
-  fprintf(stderr, "aper size is %08X\n", ctx->shared.fbSize);
-  if (drmMMInit(ctx->drmFD, aperStart, aperEnd - aperStart, DRM_BO_MEM_TT)) {
-      fprintf(stderr,
-	      "DRM MM Initialization Failed\n");
-  } else {
-    fprintf(stderr,
-	    "DRM MM Initialized at offset 0x%lx length %d page\n", aperStart, aperEnd-aperStart);
-  }
-
-}
-
-static Bool
-I830CleanupDma(const DRIDriverContext *ctx)
-{
-   drmI830Init info;
-
-   memset(&info, 0, sizeof(drmI830Init));
-   info.func = I830_CLEANUP_DMA;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT,
-		       &info, sizeof(drmI830Init))) {
-     fprintf(stderr, "I830 Dma Cleanup Failed\n");
-      return FALSE;
-   }
-
-   return TRUE;
-}
-
-static Bool
-I830InitDma(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-   I830RingBuffer *ring = pI830->LpRing;
-   drmI830Init info;
-
-   memset(&info, 0, sizeof(drmI830Init));
-   info.func = I830_INIT_DMA;
-
-   info.ring_start = ring->mem.Start + pI830->LinearAddr;
-   info.ring_end = ring->mem.End + pI830->LinearAddr;
-   info.ring_size = ring->mem.Size;
-
-   info.mmio_offset = (unsigned int)ctx->MMIOStart;
-
-   info.sarea_priv_offset = sizeof(drm_sarea_t);
-
-   info.front_offset = pI830->FrontBuffer.Start;
-   info.back_offset = pI830->BackBuffer.Start;
-   info.depth_offset = pI830->DepthBuffer.Start;
-   info.w = ctx->shared.virtualWidth;
-   info.h = ctx->shared.virtualHeight;
-   info.pitch = ctx->shared.virtualWidth;
-   info.back_pitch = pI830->BackBuffer.Pitch;
-   info.depth_pitch = pI830->DepthBuffer.Pitch;
-   info.cpp = ctx->cpp;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_INIT,
-		       &info, sizeof(drmI830Init))) {
-      fprintf(stderr,
-		 "I830 Dma Initialization Failed\n");
-      return FALSE;
-   }
-
-   return TRUE;
-}
-
-static int I830CheckDRMVersion( const DRIDriverContext *ctx,
-				  I830Rec *pI830 )
-{
-   drmVersionPtr  version;
-
-   version = drmGetVersion(ctx->drmFD);
-
-   if (version) {
-     int req_minor, req_patch;
-
-     req_minor = 4;
-     req_patch = 0;	
-
-     if (version->version_major != 1 ||
-	 version->version_minor < req_minor ||
-	 (version->version_minor == req_minor && 
-	  version->version_patchlevel < req_patch)) {
-       /* Incompatible drm version */
-       fprintf(stderr,
-	       "[dri] I830DRIScreenInit failed because of a version "
-	       "mismatch.\n"
-	       "[dri] i915.o kernel module version is %d.%d.%d "
-	       "but version 1.%d.%d or newer is needed.\n"
-	       "[dri] Disabling DRI.\n",
-	       version->version_major,
-	       version->version_minor,
-	       version->version_patchlevel,
-	       req_minor,
-	       req_patch);
-       drmFreeVersion(version);
-       return 0;
-     }
-     
-     pI830->drmMinor = version->version_minor;
-     drmFreeVersion(version);
-   }
-   return 1;
-}
-
-static void
-I830SetRingRegs(const DRIDriverContext *ctx, I830Rec *pI830)
-{
-  unsigned int itemp;
-  unsigned char *MMIO = ctx->MMIOAddress;
-
-   OUTREG(LP_RING + RING_LEN, 0);
-   OUTREG(LP_RING + RING_TAIL, 0);
-   OUTREG(LP_RING + RING_HEAD, 0);
-
-   if ((long)(pI830->LpRing->mem.Start & I830_RING_START_MASK) !=
-       pI830->LpRing->mem.Start) {
-      fprintf(stderr,
-		 "I830SetRingRegs: Ring buffer start (%lx) violates its "
-		 "mask (%x)\n", pI830->LpRing->mem.Start, I830_RING_START_MASK);
-   }
-   /* Don't care about the old value.  Reserved bits must be zero anyway. */
-   itemp = pI830->LpRing->mem.Start & I830_RING_START_MASK;
-   OUTREG(LP_RING + RING_START, itemp);
-
-   if (((pI830->LpRing->mem.Size - 4096) & I830_RING_NR_PAGES) !=
-       pI830->LpRing->mem.Size - 4096) {
-      fprintf(stderr,
-		 "I830SetRingRegs: Ring buffer size - 4096 (%lx) violates its "
-		 "mask (%x)\n", pI830->LpRing->mem.Size - 4096,
-		 I830_RING_NR_PAGES);
-   }
-   /* Don't care about the old value.  Reserved bits must be zero anyway. */
-   itemp = (pI830->LpRing->mem.Size - 4096) & I830_RING_NR_PAGES;
-   itemp |= (RING_NO_REPORT | RING_VALID);
-   OUTREG(LP_RING + RING_LEN, itemp);
-
-   pI830->LpRing->head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK;
-   pI830->LpRing->tail = INREG(LP_RING + RING_TAIL);
-   pI830->LpRing->space = pI830->LpRing->head - (pI830->LpRing->tail + 8);
-   if (pI830->LpRing->space < 0)
-      pI830->LpRing->space += pI830->LpRing->mem.Size;
-
-   SetFenceRegs(ctx, pI830);
-   
-   /* RESET THE DISPLAY PIPE TO POINT TO THE FRONTBUFFER - hacky
-      hacky hacky */
-   OUTREG(DSPABASE, pI830->FrontBuffer.Start + pI830->LinearAddr);
-
-}
-
-static Bool
-I830SetParam(const DRIDriverContext *ctx, int param, int value)
-{
-   drmI830SetParam sp;
-
-   memset(&sp, 0, sizeof(sp));
-   sp.param = param;
-   sp.value = value;
-
-   if (drmCommandWrite(ctx->drmFD, DRM_I830_SETPARAM, &sp, sizeof(sp))) {
-      fprintf(stderr, "I830 SetParam Failed\n");
-      return FALSE;
-   }
-
-   return TRUE;
-}
-
-static Bool
-I830DRIMapScreenRegions(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-   fprintf(stderr,
-              "[drm] Mapping front buffer\n");
-
-   if (drmAddMap(ctx->drmFD,
-                 (drm_handle_t)(sarea->front_offset + pI830->LinearAddr),
-                 sarea->front_size,
-                 DRM_FRAME_BUFFER,  /*DRM_AGP,*/
-                 0,
-                 &sarea->front_handle) < 0) {
-     fprintf(stderr,
-	     "[drm] drmAddMap(front_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   ctx->shared.hFrameBuffer = sarea->front_handle;
-   ctx->shared.fbSize = sarea->front_size;
-   fprintf(stderr, "[drm] Front Buffer = 0x%08x\n",
-	   sarea->front_handle);
-
-   if (drmAddMap(ctx->drmFD,
-                 (drm_handle_t)(sarea->back_offset),
-                 sarea->back_size, DRM_AGP, 0,
-                 &sarea->back_handle) < 0) {
-      fprintf(stderr,
-                 "[drm] drmAddMap(back_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   fprintf(stderr, "[drm] Back Buffer = 0x%08x\n",
-              sarea->back_handle);
-
-   if (drmAddMap(ctx->drmFD,
-                 (drm_handle_t)sarea->depth_offset,
-                 sarea->depth_size, DRM_AGP, 0,
-                 &sarea->depth_handle) < 0) {
-      fprintf(stderr,
-                 "[drm] drmAddMap(depth_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   fprintf(stderr, "[drm] Depth Buffer = 0x%08x\n",
-              sarea->depth_handle);
-
-#if 0
-   if (drmAddMap(ctx->drmFD,
-		 (drm_handle_t)sarea->tex_offset,
-		 sarea->tex_size, DRM_AGP, 0,
-		 &sarea->tex_handle) < 0) {
-      fprintf(stderr,
-		 "[drm] drmAddMap(tex_handle) failed. Disabling DRI\n");
-      return FALSE;
-   }
-   fprintf(stderr, "[drm] textures = 0x%08x\n",
-	      sarea->tex_handle);
-#endif
-   return TRUE;
-}
-
-
-static void
-I830DRIUnmapScreenRegions(const DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-#if 1
-   if (sarea->front_handle) {
-      drmRmMap(ctx->drmFD, sarea->front_handle);
-      sarea->front_handle = 0;
-   }
-#endif
-   if (sarea->back_handle) {
-      drmRmMap(ctx->drmFD, sarea->back_handle);
-      sarea->back_handle = 0;
-   }
-   if (sarea->depth_handle) {
-      drmRmMap(ctx->drmFD, sarea->depth_handle);
-      sarea->depth_handle = 0;
-   }
-   if (sarea->tex_handle) {
-      drmRmMap(ctx->drmFD, sarea->tex_handle);
-      sarea->tex_handle = 0;
-   }
-}
-
-static Bool
-I830DRIDoMappings(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-  if (drmAddMap(ctx->drmFD,
-		(drm_handle_t)pI830->LpRing->mem.Start,
-		pI830->LpRing->mem.Size, DRM_AGP, 0,
-		&pI830->ring_map) < 0) {
-    fprintf(stderr,
-	    "[drm] drmAddMap(ring_map) failed. Disabling DRI\n");
-    return FALSE;
-  }
-  fprintf(stderr, "[drm] ring buffer = 0x%08x\n",
-	  pI830->ring_map);
-
-  if (I830InitDma(ctx, pI830) == FALSE) {
-    return FALSE;
-  }
-  
-   /* init to zero to be safe */
-
-  I830DRIMapScreenRegions(ctx, pI830, sarea);
-  SetupDRIMM(ctx, pI830);
-
-   if (ctx->pciDevice != PCI_CHIP_845_G &&
-       ctx->pciDevice != PCI_CHIP_I830_M) {
-      I830SetParam(ctx, I830_SETPARAM_USE_MI_BATCHBUFFER_START, 1 );
-   }
-
-   /* Okay now initialize the dma engine */
-   {
-      pI830->irq = drmGetInterruptFromBusID(ctx->drmFD,
-					    ctx->pciBus,
-					    ctx->pciDevice,
-					    ctx->pciFunc);
-
-      if (drmCtlInstHandler(ctx->drmFD, pI830->irq)) {
-	 fprintf(stderr,
-		    "[drm] failure adding irq handler\n");
-	 pI830->irq = 0;
-	 return FALSE;
-      }
-      else
-	 fprintf(stderr,
-		    "[drm] dma control initialized, using IRQ %d\n",
-		    pI830->irq);
-   }
-
-   fprintf(stderr, "[dri] visual configs initialized\n");
-
-   return TRUE;
-}
-
-static Bool
-I830ClearScreen(DRIDriverContext *ctx, I830Rec *pI830, drmI830Sarea *sarea)
-{
-  /* need to drmMap front and back buffers and zero them */
-  drmAddress map_addr;
-  int ret;
-
-  ret = drmMap(ctx->drmFD,
-	       sarea->front_handle,
-	       sarea->front_size,
-	       &map_addr);
-
-  if (ret)
-  {
-    fprintf(stderr, "Unable to map front buffer\n");
-    return FALSE;
-  }
-
-  drimemsetio((char *)map_addr,
-	      0,
-	      sarea->front_size);
-  drmUnmap(map_addr, sarea->front_size);
-
-
-  ret = drmMap(ctx->drmFD,
-	       sarea->back_handle,
-	       sarea->back_size,
-	       &map_addr);
-
-  if (ret)
-  {
-    fprintf(stderr, "Unable to map back buffer\n");
-    return FALSE;
-  }
-
-  drimemsetio((char *)map_addr,
-	      0,
-	      sarea->back_size);
-  drmUnmap(map_addr, sarea->back_size);
-
-  return TRUE;
-}
-
-static Bool
-I830ScreenInit(DRIDriverContext *ctx, I830Rec *pI830)
-		  
-{
-   I830DRIPtr pI830DRI;
-   drmI830Sarea *pSAREAPriv;
-   int err;
-      
-   drm_page_size = getpagesize();   
-
-   pI830->registerSize = ctx->MMIOSize;
-   /* This is a hack for now.  We have to have more than a 4k page here
-    * because of the size of the state.  However, the state should be
-    * in a per-context mapping.  This will be added in the Mesa 3.5 port
-    * of the I830 driver.
-    */
-   ctx->shared.SAREASize = SAREA_MAX;
-
-   /* Note that drmOpen will try to load the kernel module, if needed. */
-   ctx->drmFD = drmOpen("i915", NULL );
-   if (ctx->drmFD < 0) {
-      fprintf(stderr, "[drm] drmOpen failed\n");
-      return 0;
-   }
-
-   if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) {
-      fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n",
-	      ctx->drmFD, ctx->pciBusID, strerror(-err));
-      return 0;
-   }
-
-   if (drmAddMap( ctx->drmFD,
-		  0,
-		  ctx->shared.SAREASize,
-		  DRM_SHM,
-		  DRM_CONTAINS_LOCK,
-		  &ctx->shared.hSAREA) < 0)
-   {
-     fprintf(stderr, "[drm] drmAddMap failed\n");
-     return 0;
-   }
-
-   fprintf(stderr, "[drm] added %d byte SAREA at 0x%08x\n",
-	   ctx->shared.SAREASize, ctx->shared.hSAREA);
-   
-   if (drmMap( ctx->drmFD,
-	       ctx->shared.hSAREA,
-	       ctx->shared.SAREASize,
-	       (drmAddressPtr)(&ctx->pSAREA)) < 0)
-   {
-      fprintf(stderr, "[drm] drmMap failed\n");
-      return 0;
-   
-   }
-   
-   memset(ctx->pSAREA, 0, ctx->shared.SAREASize);
-   fprintf(stderr, "[drm] mapped SAREA 0x%08x to %p, size %d\n",
-	   ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize);
-   
-
-   if (drmAddMap(ctx->drmFD, 
-		 ctx->MMIOStart,
-		 ctx->MMIOSize,
-		 DRM_REGISTERS, 
-		 DRM_READ_ONLY, 
-		 &pI830->registerHandle) < 0) {
-      fprintf(stderr, "[drm] drmAddMap mmio failed\n");	
-      return 0;
-   }
-   fprintf(stderr,
-	   "[drm] register handle = 0x%08x\n", pI830->registerHandle);
-
-
-   if (!I830CheckDRMVersion(ctx, pI830)) {
-     return FALSE;
-   }
-
-   /* Create a 'server' context so we can grab the lock for
-    * initialization ioctls.
-    */
-   if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) {
-      fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err);
-      return 0;
-   }
-
-   DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); 
-
-   /* Initialize the SAREA private data structure */
-   pSAREAPriv = (drmI830Sarea *)(((char*)ctx->pSAREA) + 
-				 sizeof(drm_sarea_t));
-   memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
-
-   pI830->StolenMemory.Size = I830DetectMemory(ctx, pI830);
-   pI830->StolenMemory.Start = 0;
-   pI830->StolenMemory.End = pI830->StolenMemory.Size;
-
-   pI830->MemoryAperture.Start = pI830->StolenMemory.End;
-   pI830->MemoryAperture.End = KB(40000);
-   pI830->MemoryAperture.Size = pI830->MemoryAperture.End - pI830->MemoryAperture.Start;
-
-   pI830->StolenPool.Fixed = pI830->StolenMemory;
-   pI830->StolenPool.Total = pI830->StolenMemory;
-   pI830->StolenPool.Free = pI830->StolenPool.Total;
-   pI830->FreeMemory = pI830->StolenPool.Total.Size;
-
-   if (!AgpInit(ctx, pI830))
-     return FALSE;
-
-   if (I830AllocateMemory(ctx, pI830) == FALSE)
-   {
-     return FALSE;
-   }
-
-   if (I830BindMemory(ctx, pI830) == FALSE)
-   {
-     return FALSE;
-   }
-
-   pSAREAPriv->rotated_offset = -1;
-   pSAREAPriv->rotated_size = 0;
-   pSAREAPriv->rotated_pitch = ctx->shared.virtualWidth;
-
-   pSAREAPriv->front_offset = pI830->FrontBuffer.Start;
-   pSAREAPriv->front_size = pI830->FrontBuffer.Size;
-   pSAREAPriv->width = ctx->shared.virtualWidth;
-   pSAREAPriv->height = ctx->shared.virtualHeight;
-   pSAREAPriv->pitch = ctx->shared.virtualWidth;
-   pSAREAPriv->virtualX = ctx->shared.virtualWidth;
-   pSAREAPriv->virtualY = ctx->shared.virtualHeight;
-   pSAREAPriv->back_offset = pI830->BackBuffer.Start;
-   pSAREAPriv->back_size = pI830->BackBuffer.Size;
-   pSAREAPriv->depth_offset = pI830->DepthBuffer.Start;
-   pSAREAPriv->depth_size = pI830->DepthBuffer.Size;
-#if 0
-   pSAREAPriv->tex_offset = pI830->TexMem.Start;
-   pSAREAPriv->tex_size = pI830->TexMem.Size;
-#endif
-   pSAREAPriv->log_tex_granularity = pI830->TexGranularity;
-
-   ctx->driverClientMsg = malloc(sizeof(I830DRIRec));
-   ctx->driverClientMsgSize = sizeof(I830DRIRec);
-   pI830DRI = (I830DRIPtr)ctx->driverClientMsg;
-   pI830DRI->deviceID = pI830->Chipset;
-   pI830DRI->regsSize = I830_REG_SIZE;
-   pI830DRI->width = ctx->shared.virtualWidth;
-   pI830DRI->height = ctx->shared.virtualHeight;
-   pI830DRI->mem = ctx->shared.fbSize;
-   pI830DRI->cpp = ctx->cpp;
-
-   pI830DRI->bitsPerPixel = ctx->bpp;
-   pI830DRI->sarea_priv_offset = sizeof(drm_sarea_t);
-   
-   err = I830DRIDoMappings(ctx, pI830, pSAREAPriv);
-   if (err == FALSE)
-       return FALSE;
-
-   I830SetupMemoryTiling(ctx, pI830);
-
-   /* Quick hack to clear the front & back buffers.  Could also use
-    * the clear ioctl to do this, but would need to setup hw state
-    * first.
-    */
-   I830ClearScreen(ctx, pI830, pSAREAPriv);
-
-   I830SetRingRegs(ctx, pI830);
-
-   return TRUE;
-}
-
-
-/**
- * \brief Validate the fbdev mode.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Saves some registers and returns 1.
- *
- * \sa radeonValidateMode().
- */
-static int i830ValidateMode( const DRIDriverContext *ctx )
-{
-  return 1;
-}
-
-/**
- * \brief Examine mode returned by fbdev.
- * 
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Restores registers that fbdev has clobbered and returns 1.
- *
- * \sa i810ValidateMode().
- */
-static int i830PostValidateMode( const DRIDriverContext *ctx )
-{
-  I830Rec *pI830 = ctx->driverPrivate;
-
-  I830SetRingRegs(ctx, pI830);
-  return 1;
-}
-
-
-/**
- * \brief Initialize the framebuffer device mode
- *
- * \param ctx display handle.
- *
- * \return one on success, or zero on failure.
- *
- * Fills in \p info with some default values and some information from \p ctx
- * and then calls I810ScreenInit() for the screen initialization.
- * 
- * Before exiting clears the framebuffer memory accessing it directly.
- */
-static int i830InitFBDev( DRIDriverContext *ctx )
-{
-  I830Rec *pI830 = calloc(1, sizeof(I830Rec));
-  int i;
-
-   {
-      int  dummy = ctx->shared.virtualWidth;
-
-      switch (ctx->bpp / 8) {
-      case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break;
-      case 2: dummy = (ctx->shared.virtualWidth +  31) &  ~31; break;
-      case 3:
-      case 4: dummy = (ctx->shared.virtualWidth +  15) &  ~15; break;
-      }
-
-      ctx->shared.virtualWidth = dummy;
-      ctx->shared.Width = ctx->shared.virtualWidth;
-   }
-
-
-   for (i = 0; pitches[i] != 0; i++) {
-     if (pitches[i] >= ctx->shared.virtualWidth) {
-       ctx->shared.virtualWidth = pitches[i];
-       break;
-     }
-   }
-
-   ctx->driverPrivate = (void *)pI830;
-   
-   pI830->LpRing = calloc(1, sizeof(I830RingBuffer));
-   pI830->Chipset = ctx->chipset;
-   pI830->LinearAddr = ctx->FBStart;
-
-   if (!I830ScreenInit( ctx, pI830 ))
-      return 0;
-
-   
-   return 1;
-}
-
-
-/**
- * \brief The screen is being closed, so clean up any state and free any
- * resources used by the DRI.
- *
- * \param ctx display handle.
- *
- * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver
- * private data.
- */
-static void i830HaltFBDev( DRIDriverContext *ctx )
-{
-  drmI830Sarea *pSAREAPriv;
-  I830Rec *pI830 = ctx->driverPrivate;
-
-   if (pI830->irq) {
-       drmCtlUninstHandler(ctx->drmFD);
-       pI830->irq = 0;   }
-
-   I830CleanupDma(ctx);
-
-  pSAREAPriv = (drmI830Sarea *)(((char*)ctx->pSAREA) + 
-				sizeof(drm_sarea_t));
-
-  I830DRIUnmapScreenRegions(ctx, pI830, pSAREAPriv);
-  drmUnmap( ctx->pSAREA, ctx->shared.SAREASize );
-  drmClose(ctx->drmFD);
-  
-  if (ctx->driverPrivate) {
-    free(ctx->driverPrivate);
-    ctx->driverPrivate = 0;
-  }
-}
-
-
-extern void i810NotifyFocus( int );
-
-/**
- * \brief Exported driver interface for Mini GLX.
- *
- * \sa DRIDriverRec.
- */
-const struct DRIDriverRec __driDriver = {
-   i830ValidateMode,
-   i830PostValidateMode,
-   i830InitFBDev,
-   i830HaltFBDev,
-   NULL,//I830EngineShutdown,
-   NULL, //I830EngineRestore,  
-#ifndef _EMBEDDED
-   0,
-#else
-   i810NotifyFocus, 
-#endif
-};
+../intel/server/intel_dri.c
\ No newline at end of file