diff options
| author | Michal Krol <michal@vmware.com> | 2009-12-12 16:48:32 +0100 |
|---|---|---|
| committer | Michal Krol <michal@vmware.com> | 2009-12-12 16:48:32 +0100 |
| commit | a3eb0f718e19653a2ad8e49396c904183be456f3 (patch) | |
| tree | 0092574c469ea586a6cab8b8ebb7ac62b8221a2a /src/mesa/drivers/dri/i965/brw_defines.h | |
| parent | 491f384c3958067e6c4c994041f5d8d413b806bc (diff) | |
| parent | 784cca9fa527de771754d76545970f78094b9adf (diff) | |
Merge branch 'master' into glsl-pp-rework-2
Conflicts:
progs/perf/drawoverhead.c
progs/perf/teximage.c
progs/perf/vbo.c
progs/perf/vertexrate.c
src/mesa/shader/slang/library/slang_common_builtin_gc.h
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_defines.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 78d457ad2b..c19510bbd4 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -673,18 +673,10 @@ #define BRW_SAMPLER_MESSAGE_SIMD8_LD 3 #define BRW_SAMPLER_MESSAGE_SIMD16_LD 3 -#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_IGDNG 0 -#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_IGDNG 0 -#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_IGDNG 0 -#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_BIAS_IGDNG 1 -#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_BIAS_IGDNG 1 -#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS_IGDNG 1 -#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_LOD_IGDNG 2 -#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD_IGDNG 2 -#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD_IGDNG 2 -#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_COMPARE_IGDNG 3 -#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE_IGDNG 3 -#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE_IGDNG 3 +#define BRW_SAMPLER_MESSAGE_SAMPLE_IGDNG 0 +#define BRW_SAMPLER_MESSAGE_SAMPLE_BIAS_IGDNG 1 +#define BRW_SAMPLER_MESSAGE_SAMPLE_LOD_IGDNG 2 +#define BRW_SAMPLER_MESSAGE_SAMPLE_COMPARE_IGDNG 3 /* for IGDNG only */ #define BRW_SAMPLER_SIMD_MODE_SIMD4X2 0 |