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authorBrian Paul <brianp@vmware.com>2009-12-21 18:35:54 -0700
committerBrian Paul <brianp@vmware.com>2009-12-21 18:35:54 -0700
commit9eb7fc6661a1d46c06cec8584b898e3e690af6fa (patch)
tree78ed4336c613303ef02691baf4d89e7330a0f6cf /src/mesa/drivers/dri/i965
parentae1c0a06e81b8c6f015a3b64616a5d3a989f9373 (diff)
parentb57abd3bea29e95e5dee2524c3f1be4b26017c0f (diff)
Merge branch 'mesa_7_7_branch'
Conflicts: src/mesa/main/version.h src/mesa/state_tracker/st_atom_shader.c
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_cc.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_emit.c14
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c2
3 files changed, 17 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c
index ab301b9a3a..bac1c3a49c 100644
--- a/src/mesa/drivers/dri/i965/brw_cc.c
+++ b/src/mesa/drivers/dri/i965/brw_cc.c
@@ -158,9 +158,9 @@ cc_unit_populate_key(struct brw_context *brw, struct brw_cc_unit_key *key)
/* If the renderbuffer is XRGB, we have to frob the blend function to
* force the destination alpha to 1.0. This means replacing GL_DST_ALPHA
- * with GL_ONE and GL_ONE_MINUS_DST_ALPAH with GL_ZERO.
+ * with GL_ONE and GL_ONE_MINUS_DST_ALPHA with GL_ZERO.
*/
- if (ctx->Visual.alphaBits == 0) {
+ if (ctx->DrawBuffer->Visual.alphaBits == 0) {
key->blend_src_rgb = fix_xRGB_alpha(key->blend_src_rgb);
key->blend_src_a = fix_xRGB_alpha(key->blend_src_a);
key->blend_dst_rgb = fix_xRGB_alpha(key->blend_dst_rgb);
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 00efd3443d..27aac8b54a 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -392,6 +392,17 @@ static void emit_sge( struct brw_vs_compile *c,
emit_sop(c, dst, arg0, arg1, BRW_CONDITIONAL_GE);
}
+static void emit_cmp( struct brw_compile *p,
+ struct brw_reg dst,
+ struct brw_reg arg0,
+ struct brw_reg arg1,
+ struct brw_reg arg2 )
+{
+ brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, arg0, brw_imm_f(0));
+ brw_SEL(p, dst, arg1, arg2);
+ brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+}
+
static void emit_max( struct brw_compile *p,
struct brw_reg dst,
struct brw_reg arg0,
@@ -1485,6 +1496,9 @@ void brw_vs_emit(struct brw_vs_compile *c )
brw_MOV(p, brw_acc_reg(), args[2]);
brw_MAC(p, dst, args[0], args[1]);
break;
+ case OPCODE_CMP:
+ emit_cmp(p, dst, args[0], args[1], args[2]);
+ break;
case OPCODE_MAX:
emit_max(p, dst, args[0], args[1]);
break;
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 3f9b1fbfdc..8335e5a650 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -581,7 +581,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
/* As mentioned above, disable writes to the alpha component when the
* renderbuffer is XRGB.
*/
- if (ctx->Visual.alphaBits == 0)
+ if (ctx->DrawBuffer->Visual.alphaBits == 0)
key.color_mask[3] = GL_FALSE;
key.color_blend = (!ctx->Color._LogicOpEnabled &&