r5xx: FP refactor, take one.

Yes, I know it's massive. Imagine how I felt, auditing 3000 lines of code.

5 files changed, 426 insertions, 1490 deletions

diff --git a/src/mesa/drivers/dri/r300/Makefile b/src/mesa/drivers/dri/r300/Makefile
index 7cd5647064..7b8f5f1384 100644
--- a/src/mesa/drivers/dri/r300/Makefile
+++ b/src/mesa/drivers/dri/r300/Makefile
@@ -28,7 +28,6 @@ DRIVER_SOURCES = \
 		 radeon_span.c \
 		 radeon_state.c \
 		 r300_mem.c \
-		 \
 		 r300_context.c \
 		 r300_ioctl.c \
 		 r300_cmdbuf.c \
@@ -42,6 +41,7 @@ DRIVER_SOURCES = \
 		 r300_fragprog.c \
 		 r300_fragprog_emit.c \
 		 r500_fragprog.c \
+		 r500_fragprog_emit.c \
 		 r300_shader.c \
 		 r300_emit.c \
 		 r300_swtcl.c \
diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h
index ca22c5dd8a..1a90f5cabb 100644
--- a/src/mesa/drivers/dri/r300/r300_context.h
+++ b/src/mesa/drivers/dri/r300/r300_context.h
@@ -748,14 +748,30 @@ struct r300_fragment_program {
 
 struct r500_pfs_compile_state;
 
-struct r500_fragment_program {
-	struct gl_fragment_program mesa_program;
+struct r500_fragment_program_external_state {
+	struct {
+		/**
+		 * If the sampler is used as a shadow sampler,
+		 * this field is:
+		 *  0 - GL_LUMINANCE
+		 *  1 - GL_INTENSITY
+		 *  2 - GL_ALPHA
+		 * depending on the depth texture mode.
+		 */
+		GLuint depth_texture_mode : 2;
 
-	GLcontext *ctx;
-	GLboolean translated;
-	GLboolean error;
-	struct r500_pfs_compile_state *cs;
+		/**
+		 * If the sampler is used as a shadow sampler,
+		 * this field is (texture_compare_func - GL_NEVER).
+		 * [e.g. if compare function is GL_LEQUAL, this field is 3]
+		 *
+		 * Otherwise, this field is 0.
+		 */
+		GLuint texture_compare_func : 3;
+	} unit[16];
+};
 
+struct r500_fragment_program_code {
 	struct {
 		GLuint inst0;
 		GLuint inst1;
@@ -772,17 +788,28 @@ struct r500_fragment_program {
 	int inst_end;
 
 	/* Hardware constants.
-	 * Contains a pointer to the value. The destination of the pointer
-	 * is supposed to be updated when GL state changes.
-	 * Typically, this is either a pointer into
-	 * gl_program_parameter_list::ParameterValues, or a pointer to a
-	 * global constant (e.g. for sin/cos-approximation)
-	 */
+	* Contains a pointer to the value. The destination of the pointer
+	* is supposed to be updated when GL state changes.
+	* Typically, this is either a pointer into
+	* gl_program_parameter_list::ParameterValues, or a pointer to a
+	* global constant (e.g. for sin/cos-approximation)
+	*/
 	const GLfloat *constant[PFS_NUM_CONST_REGS];
 	int const_nr;
 
 	int max_temp_idx;
+};
 
+struct r500_fragment_program {
+	struct gl_fragment_program mesa_program;
+
+	GLcontext *ctx;
+	GLboolean translated;
+	GLboolean error;
+	
+	struct r500_fragment_program_external_state state;
+	struct r500_fragment_program_code code;
+	
 	GLboolean writes_depth;
 
 	GLuint optimization;
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index e82c3d9681..a86e4bc344 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -1351,14 +1351,15 @@ static void r500SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
 	int i;
 	struct r500_fragment_program *fp = (struct r500_fragment_program *)
 	    (char *)ctx->FragmentProgram._Current;
+	struct r500_fragment_program_code *code = &fp->code;
 
 	/* find all the texture instructions and relocate the texture units */
-	for (i = 0; i < fp->inst_end + 1; i++) {
-		if ((fp->inst[i].inst0 & 0x3) == R500_INST_TYPE_TEX) {
+	for (i = 0; i < code->inst_end + 1; i++) {
+		if ((code->inst[i].inst0 & 0x3) == R500_INST_TYPE_TEX) {
 			uint32_t val;
 			int unit, opcode, new_unit;
 
-			val = fp->inst[i].inst1;
+			val = code->inst[i].inst1;
 
 			unit = (val >> 16) & 0xf;
 
@@ -1375,7 +1376,7 @@ static void r500SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
 				}
 			}
 			val |= R500_TEX_ID(new_unit);
-			fp->inst[i].inst1 = val;
+			code->inst[i].inst1 = val;
 		}
 	}
 }
@@ -2499,6 +2500,7 @@ static void r500SetupPixelShader(r300ContextPtr rmesa)
 	struct r500_fragment_program *fp = (struct r500_fragment_program *)
 	    (char *)ctx->FragmentProgram._Current;
 	int i;
+	struct r500_fragment_program_code *code;
 
 	if (!fp)		/* should only happenen once, just after context is created */
 		return;
@@ -2512,42 +2514,43 @@ static void r500SetupPixelShader(r300ContextPtr rmesa)
 			__FUNCTION__);
 		return;
 	}
+	code = &fp->code;
 
 	r300SetupTextures(ctx);
 
 	R300_STATECHANGE(rmesa, fp);
-	rmesa->hw.fp.cmd[R500_FP_PIXSIZE] = fp->max_temp_idx;
+	rmesa->hw.fp.cmd[R500_FP_PIXSIZE] = code->max_temp_idx;
 
 	rmesa->hw.fp.cmd[R500_FP_CODE_ADDR] =
-	    R500_US_CODE_START_ADDR(fp->inst_offset) |
-	    R500_US_CODE_END_ADDR(fp->inst_end);
+	    R500_US_CODE_START_ADDR(code->inst_offset) |
+	    R500_US_CODE_END_ADDR(code->inst_end);
 	rmesa->hw.fp.cmd[R500_FP_CODE_RANGE] =
-	    R500_US_CODE_RANGE_ADDR(fp->inst_offset) |
-	    R500_US_CODE_RANGE_SIZE(fp->inst_end);
+	    R500_US_CODE_RANGE_ADDR(code->inst_offset) |
+	    R500_US_CODE_RANGE_SIZE(code->inst_end);
 	rmesa->hw.fp.cmd[R500_FP_CODE_OFFSET] =
 	    R500_US_CODE_OFFSET_ADDR(0); /* FIXME when we add flow control */
 
 	R300_STATECHANGE(rmesa, r500fp);
 	/* Emit our shader... */
-	for (i = 0; i < fp->inst_end+1; i++) {
-		rmesa->hw.r500fp.cmd[i*6+1] = fp->inst[i].inst0;
-		rmesa->hw.r500fp.cmd[i*6+2] = fp->inst[i].inst1;
-		rmesa->hw.r500fp.cmd[i*6+3] = fp->inst[i].inst2;
-		rmesa->hw.r500fp.cmd[i*6+4] = fp->inst[i].inst3;
-		rmesa->hw.r500fp.cmd[i*6+5] = fp->inst[i].inst4;
-		rmesa->hw.r500fp.cmd[i*6+6] = fp->inst[i].inst5;
+	for (i = 0; i < code->inst_end+1; i++) {
+		rmesa->hw.r500fp.cmd[i*6+1] = code->inst[i].inst0;
+		rmesa->hw.r500fp.cmd[i*6+2] = code->inst[i].inst1;
+		rmesa->hw.r500fp.cmd[i*6+3] = code->inst[i].inst2;
+		rmesa->hw.r500fp.cmd[i*6+4] = code->inst[i].inst3;
+		rmesa->hw.r500fp.cmd[i*6+5] = code->inst[i].inst4;
+		rmesa->hw.r500fp.cmd[i*6+6] = code->inst[i].inst5;
 	}
 
-	bump_r500fp_count(rmesa->hw.r500fp.cmd, (fp->inst_end + 1) * 6);
+	bump_r500fp_count(rmesa->hw.r500fp.cmd, (code->inst_end + 1) * 6);
 
 	R300_STATECHANGE(rmesa, r500fp_const);
-	for (i = 0; i < fp->const_nr; i++) {
-		rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat32(fp->constant[i][0]);
-		rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat32(fp->constant[i][1]);
-		rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat32(fp->constant[i][2]);
-		rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat32(fp->constant[i][3]);
+	for (i = 0; i < code->const_nr; i++) {
+		rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat32(code->constant[i][0]);
+		rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat32(code->constant[i][1]);
+		rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat32(code->constant[i][2]);
+		rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat32(code->constant[i][3]);
 	}
-	bump_r500fp_const_count(rmesa->hw.r500fp_const.cmd, fp->const_nr * 4);
+	bump_r500fp_const_count(rmesa->hw.r500fp_const.cmd, code->const_nr * 4);
 
 }
 
diff --git a/src/mesa/drivers/dri/r300/r500_fragprog.c b/src/mesa/drivers/dri/r300/r500_fragprog.c
index 70e45f3ea8..197036008a 100644
--- a/src/mesa/drivers/dri/r300/r500_fragprog.c
+++ b/src/mesa/drivers/dri/r300/r500_fragprog.c
@@ -1,8 +1,5 @@
 /*
- * Copyright (C) 2005 Ben Skeggs.
- *
  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
- * Adaptation and modification for ATI/AMD Radeon R500 GPU chipsets.
  *
  * All Rights Reserved.
  *
@@ -28,1491 +25,391 @@
  *
  */
 
-/**
- * \file
- *
- * \author Ben Skeggs <darktama@iinet.net.au>
- *
- * \author Jerome Glisse <j.glisse@gmail.com>
- *
- * \author Corbin Simpson <MostAwesomeDude@gmail.com>
- *
- * \todo Depth write, WPOS/FOGC inputs
- *
- * \todo FogOption
- *
- * \todo Verify results of opcodes for accuracy, I've only checked them in
- * specific cases.
- */
-
-#include "glheader.h"
-#include "macros.h"
-#include "enums.h"
-#include "shader/prog_instruction.h"
-#include "shader/prog_parameter.h"
-#include "shader/prog_print.h"
-
-#include "r300_context.h"
 #include "r500_fragprog.h"
-#include "r300_reg.h"
-#include "r300_state.h"
-
-/* Mapping Mesa registers to R500 temporaries */
-struct reg_acc {
-	int reg;		/* Assigned hw temp */
-	unsigned int refcount;	/* Number of uses by mesa program */
-};
 
-/**
- * Describe the current lifetime information for an R300 temporary
- */
-struct reg_lifetime {
-	/* Index of the first slot where this register is free in the sense
-	   that it can be used as a new destination register.
-	   This is -1 if the register has been assigned to a Mesa register
-	   and the last access to the register has not yet been emitted */
-	int free;
-
-	/* Index of the first slot where this register is currently reserved.
-	   This is used to stop e.g. a scalar operation from being moved
-	   before the allocation time of a register that was first allocated
-	   for a vector operation. */
-	int reserved;
-
-	/* Index of the first slot in which the register can be used as a
-	   source without losing the value that is written by the last
-	   emitted instruction that writes to the register */
-	int vector_valid;
-	int scalar_valid;
-
-	/* Index to the slot where the register was last read.
-	   This is also the first slot in which the register may be written again */
-	int vector_lastread;
-	int scalar_lastread;
-};
-
-/**
- * Store usage information about an ALU instruction slot during the
- * compilation of a fragment program.
- */
-#define SLOT_SRC_VECTOR  (1<<0)
-#define SLOT_SRC_SCALAR  (1<<3)
-#define SLOT_SRC_BOTH    (SLOT_SRC_VECTOR | SLOT_SRC_SCALAR)
-#define SLOT_OP_VECTOR   (1<<16)
-#define SLOT_OP_SCALAR   (1<<17)
-#define SLOT_OP_BOTH     (SLOT_OP_VECTOR | SLOT_OP_SCALAR)
-
-struct r500_pfs_compile_slot {
-	/* Bitmask indicating which parts of the slot are used, using SLOT_ constants
-	   defined above */
-	unsigned int used;
-
-	/* Selected sources */
-	int vsrc[3];
-	int ssrc[3];
-};
+static void reset_srcreg(struct prog_src_register* reg)
+{
+	_mesa_bzero(reg, sizeof(*reg));
+	reg->Swizzle = SWIZZLE_NOOP;
+}
 
 /**
- * Store information during compilation of fragment programs.
+ * Transform TEX, TXP, TXB, and KIL instructions in the following way:
+ *  - premultiply texture coordinates for RECT
+ *  - extract operand swizzles
+ *  - introduce a temporary register when write masks are needed
+ *
+ * \todo If/when r5xx uses the radeon_program architecture, this can probably
+ * be reused.
  */
-struct r500_pfs_compile_state {
-	int nrslots;		/* number of ALU slots used so far */
-
-	/* Track which (parts of) slots are already filled with instructions */
-	struct r500_pfs_compile_slot slot[PFS_MAX_ALU_INST];
-
-	/* Track the validity of R300 temporaries */
-	struct reg_lifetime hwtemps[PFS_NUM_TEMP_REGS];
-
-	/* Used to map Mesa's inputs/temps onto hardware temps */
-	int temp_in_use;
-	struct reg_acc temps[PFS_NUM_TEMP_REGS];
-	struct reg_acc inputs[32];	/* don't actually need 32... */
-
-	/* Track usage of hardware temps, for register allocation,
-	 * indirection detection, etc. */
-	GLuint used_in_node;
-	GLuint dest_in_node;
-};
+static GLboolean transform_TEX(
+	struct radeon_program_transform_context* context,
+	struct prog_instruction* orig_inst, void* data)
+{
+	struct r500_fragment_program_compiler *compiler =
+		(struct r500_fragment_program_compiler*)data;
+	struct prog_instruction inst = *orig_inst;
+	struct prog_instruction* tgt;
+	GLboolean destredirect = GL_FALSE;
+
+	if (inst.Opcode != OPCODE_TEX &&
+	    inst.Opcode != OPCODE_TXB &&
+	    inst.Opcode != OPCODE_TXP &&
+	    inst.Opcode != OPCODE_KIL)
+		return GL_FALSE;
 
+	if (inst.Opcode != OPCODE_KIL &&
+	    compiler->fp->mesa_program.Base.ShadowSamplers & (1 << inst.TexSrcUnit)) {
+		GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
+
+		if (comparefunc == GL_NEVER || comparefunc == GL_ALWAYS) {
+			tgt = radeonClauseInsertInstructions(context->compiler, context->dest,
+				context->dest->NumInstructions, 1);
+
+			tgt->Opcode = OPCODE_MAD;
+			tgt->DstReg = inst.DstReg;
+			tgt->SrcReg[0].File = PROGRAM_BUILTIN;
+			tgt->SrcReg[0].Swizzle = SWIZZLE_0000;
+			tgt->SrcReg[1].File = PROGRAM_BUILTIN;
+			tgt->SrcReg[1].Swizzle = SWIZZLE_0000;
+			tgt->SrcReg[2].File = PROGRAM_BUILTIN;
+			tgt->SrcReg[2].Swizzle = comparefunc == GL_ALWAYS ? SWIZZLE_1111 : SWIZZLE_0000;
+			return GL_TRUE;
+		}
 
-/*
- * Useful macros and values
- */
-#define ERROR(fmt, args...) do {			\
-		fprintf(stderr, "%s::%s(): " fmt "\n",	\
-			__FILE__, __FUNCTION__, ##args);	\
-		fp->error = GL_TRUE;			\
-	} while(0)
-
-#define COMPILE_STATE struct r500_pfs_compile_state *cs = fp->cs
-
-#define R500_US_NUM_TEMP_REGS 128
-#define R500_US_NUM_CONST_REGS 256
-
-/* "Register" flags */
-#define REG_CONSTANT (1 << 8)
-#define REG_SRC_REL (1 << 9)
-#define REG_DEST_REL (1 << 7)
-
-/* Swizzle tools */
-#define R500_SWIZZLE_ZERO 4
-#define R500_SWIZZLE_HALF 5
-#define R500_SWIZZLE_ONE 6
-#define R500_SWIZ_RGB_ZERO ((4 << 0) | (4 << 3) | (4 << 6))
-#define R500_SWIZ_RGB_ONE ((6 << 0) | (6 << 3) | (6 << 6))
-#define R500_SWIZ_RGB_RGB ((0 << 0) | (1 << 3) | (2 << 6))
-#define R500_SWIZ_MOD_NEG 1
-#define R500_SWIZ_MOD_ABS 2
-#define R500_SWIZ_MOD_NEG_ABS 3
-/* Swizzles for inst2 */
-#define MAKE_SWIZ_TEX_STRQ(x) (x << 8)
-#define MAKE_SWIZ_TEX_RGBA(x) (x << 24)
-/* Swizzles for inst3 */
-#define MAKE_SWIZ_RGB_A(x) (x << 2)
-#define MAKE_SWIZ_RGB_B(x) (x << 15)
-/* Swizzles for inst4 */
-#define MAKE_SWIZ_ALPHA_A(x) (x << 14)
-#define MAKE_SWIZ_ALPHA_B(x) (x << 21)
-/* Swizzle for inst5 */
-#define MAKE_SWIZ_RGBA_C(x) (x << 14)
-#define MAKE_SWIZ_ALPHA_C(x) (x << 27)
-
-/* Writemasks */
-#define R500_WRITEMASK_G 0x2
-#define R500_WRITEMASK_B 0x4
-#define R500_WRITEMASK_RGB 0x7
-#define R500_WRITEMASK_A 0x8
-#define R500_WRITEMASK_AR 0x9
-#define R500_WRITEMASK_AG 0xA
-#define R500_WRITEMASK_ARG 0xB
-#define R500_WRITEMASK_AB 0xC
-#define R500_WRITEMASK_ARGB 0xF
-
-/* 1/(2pi), needed for quick modulus in trig insts
- * Thanks to glisse for pointing out how to do it! */
-static const GLfloat RCP_2PI[] = {0.15915494309189535,
-	0.15915494309189535,
-	0.15915494309189535,
-	0.15915494309189535};
-
-static const GLfloat LIT[] = {127.999999,
-	127.999999,
-	127.999999,
-	-127.999999};
-
-static void dump_program(struct r500_fragment_program *fp);
-
-static inline GLuint make_rgb_swizzle(struct prog_src_register src) {
-	GLuint swiz = 0x0;
-	GLuint temp;
-	/* This could be optimized, but it should be plenty fast already. */
-	int i;
-	for (i = 0; i < 3; i++) {
-	        temp = GET_SWZ(src.Swizzle, i);
-		/* Fix SWIZZLE_ONE */
-		if (temp == 5) temp++;
-		swiz |= temp << i*3;
-	}
-	if (src.NegateBase)
-		swiz |= (R500_SWIZ_MOD_NEG << 9);
-	return swiz;
-}
+		int tempreg = radeonCompilerAllocateTemporary(context->compiler);
 
-static inline GLuint make_rgba_swizzle(GLuint src) {
-	GLuint swiz = 0x0;
-	GLuint temp;
-	int i;
-	for (i = 0; i < 4; i++) {
-	        temp = GET_SWZ(src, i);
-		/* Fix SWIZZLE_ONE */
-		if (temp == 5) temp++;
-		swiz |= temp << i*3;
+		inst.DstReg.File = PROGRAM_TEMPORARY;
+		inst.DstReg.Index = tempreg;
+		inst.DstReg.WriteMask = WRITEMASK_XYZW;
 	}
-	return swiz;
-}
 
-static inline GLuint make_alpha_swizzle(struct prog_src_register src) {
-	GLuint swiz = GET_SWZ(src.Swizzle, 3);
-
-	if (swiz == 5) swiz++;
-
-	if (src.NegateBase)
-		swiz |= (R500_SWIZ_MOD_NEG << 3);
-
-	return swiz;
-}
 
-static inline GLuint make_sop_swizzle(struct prog_src_register src) {
-	GLuint swiz = GET_SWZ(src.Swizzle, 0);
-
-	if (swiz == 5) swiz++;
-	return swiz;
-}
-
-static inline GLuint make_strq_swizzle(struct prog_src_register src) {
-	GLuint swiz = 0x0, temp = 0x0;
-	int i;
-	for (i = 0; i < 4; i++) {
-		temp = GET_SWZ(src.Swizzle, i) & 0x3;
-		swiz |= temp << i*2;
+	/* Hardware uses [0..1]x[0..1] range for rectangle textures
+	 * instead of [0..Width]x[0..Height].
+	 * Add a scaling instruction.
+	 */
+	if (inst.Opcode != OPCODE_KIL && inst.TexSrcTarget == TEXTURE_RECT_INDEX) {
+		gl_state_index tokens[STATE_LENGTH] = {
+			STATE_INTERNAL, STATE_R300_TEXRECT_FACTOR, 0, 0,
+			0
+		};
+
+		int tempreg = radeonCompilerAllocateTemporary(context->compiler);
+		int factor_index;
+
+		tokens[2] = inst.TexSrcUnit;
+		factor_index =
+			_mesa_add_state_reference(
+				compiler->fp->mesa_program.Base.Parameters, tokens);
+
+		tgt = radeonClauseInsertInstructions(context->compiler, context->dest,
+			context->dest->NumInstructions, 1);
+
+		tgt->Opcode = OPCODE_MAD;
+		tgt->DstReg.File = PROGRAM_TEMPORARY;
+		tgt->DstReg.Index = tempreg;
+		tgt->SrcReg[0] = inst.SrcReg[0];
+		tgt->SrcReg[1].File = PROGRAM_STATE_VAR;
+		tgt->SrcReg[1].Index = factor_index;
+		tgt->SrcReg[2].File = PROGRAM_BUILTIN;
+		tgt->SrcReg[2].Swizzle = SWIZZLE_0000;
+
+		reset_srcreg(&inst.SrcReg[0]);
+		inst.SrcReg[0].File = PROGRAM_TEMPORARY;
+		inst.SrcReg[0].Index = tempreg;
 	}
-	return swiz;
-}
 
-static int get_temp(struct r500_fragment_program *fp, int slot) {
-
-	COMPILE_STATE;
-
-	int r = fp->temp_reg_offset + cs->temp_in_use + slot;
-
-	if (r > R500_US_NUM_TEMP_REGS) {
-		ERROR("Too many temporary registers requested, can't compile!\n");
+	/* Texture operations do not support swizzles etc. in hardware,
+	 * so emit an additional arithmetic operation if necessary.
+	 */
+	if (inst.SrcReg[0].Swizzle != SWIZZLE_NOOP ||
+	    inst.SrcReg[0].Abs || inst.SrcReg[0].NegateBase || inst.SrcReg[0].NegateAbs) {
+		int tempreg = radeonCompilerAllocateTemporary(context->compiler);
+
+		tgt = radeonClauseInsertInstructions(context->compiler, context->dest,
+			context->dest->NumInstructions, 1);
+
+		tgt->Opcode = OPCODE_MAD;
+		tgt->DstReg.File = PROGRAM_TEMPORARY;
+		tgt->DstReg.Index = tempreg;
+		tgt->SrcReg[0] = inst.SrcReg[0];
+		tgt->SrcReg[1].File = PROGRAM_BUILTIN;
+		tgt->SrcReg[1].Swizzle = SWIZZLE_1111;
+		tgt->SrcReg[2].File = PROGRAM_BUILTIN;
+		tgt->SrcReg[2].Swizzle = SWIZZLE_0000;
+
+		reset_srcreg(&inst.SrcReg[0]);
+		inst.SrcReg[0].File = PROGRAM_TEMPORARY;
+		inst.SrcReg[0].Index = tempreg;
 	}
 
-	return r;
-}
-
-/* Borrowed verbatim from r300_fragprog since it hasn't changed. */
-static GLuint emit_const4fv(struct r500_fragment_program *fp,
-			    const GLfloat * cp)
-{
-	GLuint reg = 0x0;
-	int index;
+	if (inst.Opcode != OPCODE_KIL) {
+		if (inst.DstReg.File != PROGRAM_TEMPORARY ||
+		    inst.DstReg.WriteMask != WRITEMASK_XYZW) {
+			int tempreg = radeonCompilerAllocateTemporary(context->compiler);
 
-	for (index = 0; index < fp->const_nr; ++index) {
-		if (fp->constant[index] == cp)
-			break;
+			inst.DstReg.File = PROGRAM_TEMPORARY;
+			inst.DstReg.Index = tempreg;
+			inst.DstReg.WriteMask = WRITEMASK_XYZW;
+			destredirect = GL_TRUE;
+		}
 	}
 
-	if (index >= fp->const_nr) {
-		if (index >= R500_US_NUM_CONST_REGS) {
-			ERROR("Out of hw constants!\n");
-			return reg;
+	tgt = radeonClauseInsertInstructions(context->compiler, context->dest,
+		context->dest->NumInstructions, 1);
+	_mesa_copy_instructions(tgt, &inst, 1);
+
+	if (inst.Opcode != OPCODE_KIL &&
+	    compiler->fp->mesa_program.Base.ShadowSamplers & (1 << inst.TexSrcUnit)) {
+		GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
+		GLuint depthmode = compiler->fp->state.unit[inst.TexSrcUnit].depth_texture_mode;
+
+		tgt = radeonClauseInsertInstructions(context->compiler, context->dest,
+			context->dest->NumInstructions, 2);
+
+		tgt[0].Opcode = OPCODE_MAD;
+		tgt[0].DstReg = inst.DstReg;
+		tgt[0].DstReg.WriteMask = orig_inst->DstReg.WriteMask;
+		tgt[0].SrcReg[0].File = PROGRAM_TEMPORARY;
+		tgt[0].SrcReg[0].Index = inst.DstReg.Index;
+		if (depthmode == 0) /* GL_LUMINANCE */
+			tgt[0].SrcReg[0].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z);
+		else if (depthmode == 2) /* GL_ALPHA */
+			tgt[0].SrcReg[0].Swizzle = SWIZZLE_WWWW;
+		tgt[0].SrcReg[1].File = PROGRAM_BUILTIN;
+		tgt[0].SrcReg[1].Swizzle = SWIZZLE_1111;
+		tgt[0].SrcReg[2] = inst.SrcReg[0];
+		tgt[0].SrcReg[2].Swizzle = SWIZZLE_ZZZZ;
+
+		/* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
+		 *   r  < tex  <=>      -tex+r < 0
+		 *   r >= tex  <=> not (-tex+r < 0 */
+		if (comparefunc == GL_LESS || comparefunc == GL_GEQUAL)
+			tgt[0].SrcReg[0].NegateBase = tgt[0].SrcReg[0].NegateBase ^ NEGATE_XYZW;
+		else
+			tgt[0].SrcReg[2].NegateBase = tgt[0].SrcReg[2].NegateBase ^ NEGATE_XYZW;
+
+		tgt[1].Opcode = OPCODE_CMP;
+		tgt[1].DstReg = orig_inst->DstReg;
+		tgt[1].SrcReg[0].File = PROGRAM_TEMPORARY;
+		tgt[1].SrcReg[0].Index = tgt[0].DstReg.Index;
+		tgt[1].SrcReg[1].File = PROGRAM_BUILTIN;
+		tgt[1].SrcReg[2].File = PROGRAM_BUILTIN;
+
+		if (comparefunc == GL_LESS || comparefunc == GL_GREATER) {
+			tgt[1].SrcReg[1].Swizzle = SWIZZLE_1111;
+			tgt[1].SrcReg[2].Swizzle = SWIZZLE_0000;
+		} else {
+			tgt[1].SrcReg[1].Swizzle = SWIZZLE_0000;
+			tgt[1].SrcReg[2].Swizzle = SWIZZLE_1111;
 		}
-
-		fp->const_nr++;
-		fp->constant[index] = cp;
+	} else if (destredirect) {
+		tgt = radeonClauseInsertInstructions(context->compiler, context->dest,
+			context->dest->NumInstructions, 1);
+
+		tgt->Opcode = OPCODE_MAD;
+		tgt->DstReg = orig_inst->DstReg;
+		tgt->SrcReg[0].File = PROGRAM_TEMPORARY;
+		tgt->SrcReg[0].Index = inst.DstReg.Index;
+		tgt->SrcReg[1].File = PROGRAM_BUILTIN;
+		tgt->SrcReg[1].Swizzle = SWIZZLE_1111;
+		tgt->SrcReg[2].File = PROGRAM_BUILTIN;
+		tgt->SrcReg[2].Swizzle = SWIZZLE_0000;
 	}
 
-	reg = index | REG_CONSTANT;
-	return reg;
-}
-
-static GLuint make_src(struct r500_fragment_program *fp, struct prog_src_register src) {
-	COMPILE_STATE;
-	GLuint reg;
-	switch (src.File) {
-	case PROGRAM_TEMPORARY:
-		reg = src.Index + fp->temp_reg_offset;
-		break;
-	case PROGRAM_INPUT:
-		reg = cs->inputs[src.Index].reg;
-		break;
-	case PROGRAM_LOCAL_PARAM:
-		reg = emit_const4fv(fp,
-				    fp->mesa_program.Base.LocalParams[src.
-								      Index]);
-		break;
-	case PROGRAM_ENV_PARAM:
-		reg = emit_const4fv(fp,
-				    fp->ctx->FragmentProgram.Parameters[src.
-									Index]);
-		break;
-	case PROGRAM_STATE_VAR:
-	case PROGRAM_NAMED_PARAM:
-	case PROGRAM_CONSTANT:
-		reg = emit_const4fv(fp, fp->mesa_program.Base.Parameters->
-				    ParameterValues[src.Index]);
-		break;
-	default:
-		ERROR("Can't handle src.File %x\n", src.File);
-		reg = 0x0;
-		break;
-	}
-	return reg;
+	return GL_TRUE;
 }
 
-static GLuint make_dest(struct r500_fragment_program *fp, struct prog_dst_register dest) {
-	GLuint reg;
-	switch (dest.File) {
-		case PROGRAM_TEMPORARY:
-			reg = dest.Index + fp->temp_reg_offset;
-			break;
-		case PROGRAM_OUTPUT:
-			/* Eventually we may need to handle multiple
-			 * rendering targets... */
-			reg = dest.Index;
-			break;
-		default:
-			ERROR("Can't handle dest.File %x\n", dest.File);
-			reg = 0x0;
-			break;
-	}
-	return reg;
-}
 
-static void emit_tex(struct r500_fragment_program *fp,
-		     struct prog_instruction *fpi, int dest, int counter)
+static void update_params(r300ContextPtr r300, struct r500_fragment_program *fp)
 {
-	int hwsrc, hwdest;
-	GLuint mask;
+	struct gl_fragment_program *mp = &fp->mesa_program;
 
-	mask = fpi->DstReg.WriteMask << 11;
-	hwsrc = make_src(fp, fpi->SrcReg[0]);
+	/* Ask Mesa nicely to fill in ParameterValues for us */
+	if (mp->Base.Parameters)
+		_mesa_load_state_parameters(r300->radeon.glCtx, mp->Base.Parameters);
+}
 
-	if (fpi->DstReg.File == PROGRAM_OUTPUT) {
-		hwdest = get_temp(fp, 0);
-	} else {
-		hwdest = dest;
-	}
 
-	fp->inst[counter].inst0 = R500_INST_TYPE_TEX | mask
-		| R500_INST_TEX_SEM_WAIT;
-
-	fp->inst[counter].inst1 = R500_TEX_ID(fpi->TexSrcUnit)
-		| R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED;
-
-	if (fpi->TexSrcTarget == TEXTURE_RECT_INDEX)
-	        fp->inst[counter].inst1 |= R500_TEX_UNSCALED;
-
-	switch (fpi->Opcode) {
-	case OPCODE_KIL:
-		fp->inst[counter].inst1 |= R500_TEX_INST_TEXKILL;
-		break;
-	case OPCODE_TEX:
-		fp->inst[counter].inst1 |= R500_TEX_INST_LD;
-		break;
-	case OPCODE_TXB:
-		fp->inst[counter].inst1 |= R500_TEX_INST_LODBIAS;
-		break;
-	case OPCODE_TXP:
-		fp->inst[counter].inst1 |= R500_TEX_INST_PROJ;
-		break;
-	default:
-		ERROR("emit_tex can't handle opcode %x\n", fpi->Opcode);
-	}
+/**
+ * Transform the program to support fragment.position.
+ *
+ * Introduce a small fragment at the start of the program that will be
+ * the only code that directly reads the FRAG_ATTRIB_WPOS input.
+ * All other code pieces that reference that input will be rewritten
+ * to read from a newly allocated temporary.
+ *
+ * \todo if/when r5xx supports the radeon_program architecture, this is a
+ * likely candidate for code sharing.
+ */
+static void insert_WPOS_trailer(struct r500_fragment_program_compiler *compiler)
+{
+	GLuint InputsRead = compiler->fp->mesa_program.Base.InputsRead;
 
-	fp->inst[counter].inst2 = R500_TEX_SRC_ADDR(hwsrc)
-		| MAKE_SWIZ_TEX_STRQ(make_strq_swizzle(fpi->SrcReg[0]))
-		/* | R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G
-		| R500_TEX_SRC_R_SWIZ_B | R500_TEX_SRC_Q_SWIZ_A */
-		| R500_TEX_DST_ADDR(hwdest)
-		| R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G
-		| R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A;
-
-	fp->inst[counter].inst3 = 0x0;
-	fp->inst[counter].inst4 = 0x0;
-	fp->inst[counter].inst5 = 0x0;
-
-	if (fpi->DstReg.File == PROGRAM_OUTPUT) {
-		counter++;
-		fp->inst[counter].inst0 = R500_INST_TYPE_OUT
-			| R500_INST_TEX_SEM_WAIT | (mask << 4);
-		fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
-		fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
-		fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-			| MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB)
-			| R500_ALU_RGB_SEL_B_SRC0
-			| MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB)
-			| R500_ALU_RGB_OMOD_DISABLE;
-		fp->inst[counter].inst4 = R500_ALPHA_OP_CMP
-			| R500_ALPHA_ADDRD(dest)
-			| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_ALPHA_SWIZ_A_A)
-			| R500_ALPHA_SEL_B_SRC0 | MAKE_SWIZ_ALPHA_B(R500_ALPHA_SWIZ_A_A)
-			| R500_ALPHA_OMOD_DISABLE;
-		fp->inst[counter].inst5 = R500_ALU_RGBA_OP_CMP
-			| R500_ALU_RGBA_ADDRD(dest)
-			| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
-			| MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
-	}
-}
+	if (!(InputsRead & FRAG_BIT_WPOS))
+		return;
 
-static void emit_alu(struct r500_fragment_program *fp, int counter, struct prog_instruction *fpi) {
-	/* Ideally, we shouldn't have to explicitly clear memory here! */
-	fp->inst[counter].inst0 = 0x0;
-	fp->inst[counter].inst1 = 0x0;
-	fp->inst[counter].inst2 = 0x0;
-	fp->inst[counter].inst3 = 0x0;
-	fp->inst[counter].inst4 = 0x0;
-	fp->inst[counter].inst5 = 0x0;
-
-	if (fpi->DstReg.File == PROGRAM_OUTPUT) {
-		fp->inst[counter].inst0 = R500_INST_TYPE_OUT;
-
-		if (fpi->DstReg.Index == FRAG_RESULT_COLR)
-			fp->inst[counter].inst0 |= (fpi->DstReg.WriteMask << 15);
-
-		if (fpi->DstReg.Index == FRAG_RESULT_DEPR) {
-			fp->inst[counter].inst4 |= R500_ALPHA_W_OMASK;
-			/* Notify the state emission! */
-			fp->writes_depth = GL_TRUE;
+	static gl_state_index tokens[STATE_LENGTH] = {
+		STATE_INTERNAL, STATE_R300_WINDOW_DIMENSION, 0, 0, 0
+	};
+	struct prog_instruction *fpi;
+	GLuint window_index;
+	int i = 0;
+	GLuint tempregi = radeonCompilerAllocateTemporary(&compiler->compiler);
+
+	fpi = radeonClauseInsertInstructions(&compiler->compiler, &compiler->compiler.Clauses[0], 0, 3);
+
+	/* perspective divide */
+	fpi[i].Opcode = OPCODE_RCP;
+
+	fpi[i].DstReg.File = PROGRAM_TEMPORARY;
+	fpi[i].DstReg.Index = tempregi;
+	fpi[i].DstReg.WriteMask = WRITEMASK_W;
+	fpi[i].DstReg.CondMask = COND_TR;
+
+	fpi[i].SrcReg[0].File = PROGRAM_INPUT;
+	fpi[i].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
+	fpi[i].SrcReg[0].Swizzle = SWIZZLE_WWWW;
+	i++;
+
+	fpi[i].Opcode = OPCODE_MUL;
+
+	fpi[i].DstReg.File = PROGRAM_TEMPORARY;
+	fpi[i].DstReg.Index = tempregi;
+	fpi[i].DstReg.WriteMask = WRITEMASK_XYZ;
+	fpi[i].DstReg.CondMask = COND_TR;
+
+	fpi[i].SrcReg[0].File = PROGRAM_INPUT;
+	fpi[i].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
+	fpi[i].SrcReg[0].Swizzle = SWIZZLE_XYZW;
+
+	fpi[i].SrcReg[1].File = PROGRAM_TEMPORARY;
+	fpi[i].SrcReg[1].Index = tempregi;
+	fpi[i].SrcReg[1].Swizzle = SWIZZLE_WWWW;
+	i++;
+
+	/* viewport transformation */
+	window_index = _mesa_add_state_reference(compiler->fp->mesa_program.Base.Parameters, tokens);
+
+	fpi[i].Opcode = OPCODE_MAD;
+
+	fpi[i].DstReg.File = PROGRAM_TEMPORARY;
+	fpi[i].DstReg.Index = tempregi;
+	fpi[i].DstReg.WriteMask = WRITEMASK_XYZ;
+	fpi[i].DstReg.CondMask = COND_TR;
+
+	fpi[i].SrcReg[0].File = PROGRAM_TEMPORARY;
+	fpi[i].SrcReg[0].Index = tempregi;
+	fpi[i].SrcReg[0].Swizzle =
+	    MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
+
+	fpi[i].SrcReg[1].File = PROGRAM_STATE_VAR;
+	fpi[i].SrcReg[1].Index = window_index;
+	fpi[i].SrcReg[1].Swizzle =
+	    MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
+
+	fpi[i].SrcReg[2].File = PROGRAM_STATE_VAR;
+	fpi[i].SrcReg[2].Index = window_index;
+	fpi[i].SrcReg[2].Swizzle =
+	    MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
+	i++;
+
+	for (; i < compiler->compiler.Clauses[0].NumInstructions; ++i) {
+		int reg;
+		for (reg = 0; reg < 3; reg++) {
+			if (fpi[i].SrcReg[reg].File == PROGRAM_INPUT &&
+			    fpi[i].SrcReg[reg].Index == FRAG_ATTRIB_WPOS) {
+				fpi[i].SrcReg[reg].File = PROGRAM_TEMPORARY;
+				fpi[i].SrcReg[reg].Index = tempregi;
+			}
 		}
-	} else {
-		fp->inst[counter].inst0 = R500_INST_TYPE_ALU
-			/* pixel_mask */
-			| (fpi->DstReg.WriteMask << 11);
 	}
-
-	fp->inst[counter].inst0 |= R500_INST_TEX_SEM_WAIT;
 }
 
-static void emit_mov(struct r500_fragment_program *fp, int counter, struct prog_instruction *fpi, GLuint src_reg, GLuint swizzle, GLuint dest) {
-	/* The r3xx shader uses MAD to implement MOV. We are using CMP, since
-	 * it is technically more accurate and recommended by ATI/AMD. */
-	emit_alu(fp, counter, fpi);
-	fp->inst[counter].inst1 = R500_RGB_ADDR0(src_reg);
-	fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src_reg);
-	/* (De)mangle the swizzle from Mesa to R500. */
-	swizzle = make_rgba_swizzle(swizzle);
-	/* 0x1FF is 9 bits, size of an RGB swizzle. */
-	fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-		| MAKE_SWIZ_RGB_A((swizzle & 0x1ff))
-		| R500_ALU_RGB_SEL_B_SRC0
-		| MAKE_SWIZ_RGB_B((swizzle & 0x1ff))
-		| R500_ALU_RGB_OMOD_DISABLE;
-	fp->inst[counter].inst4 |= R500_ALPHA_OP_CMP
-		| R500_ALPHA_ADDRD(dest)
-		| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(GET_SWZ(swizzle, 3))
-		| R500_ALPHA_SEL_B_SRC0 | MAKE_SWIZ_ALPHA_B(GET_SWZ(swizzle, 3))
-		| R500_ALPHA_OMOD_DISABLE;
-	fp->inst[counter].inst5 = R500_ALU_RGBA_OP_CMP
-		| R500_ALU_RGBA_ADDRD(dest)
-		| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
-		| MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
-}
-
-static void emit_mad(struct r500_fragment_program *fp, int counter, struct prog_instruction *fpi, int one, int two, int three) {
-	/* Note: This code was all Corbin's. Corbin is a rather hackish coder.
-	 * If you can make it pretty or fast, please do so! */
-	emit_alu(fp, counter, fpi);
-	/* Common MAD stuff */
-	fp->inst[counter].inst4 |= R500_ALPHA_OP_MAD
-		| R500_ALPHA_ADDRD(make_dest(fp, fpi->DstReg));
-	fp->inst[counter].inst5 |= R500_ALU_RGBA_OP_MAD
-		| R500_ALU_RGBA_ADDRD(make_dest(fp, fpi->DstReg));
-	switch (one) {
-		case 0:
-		case 1:
-		case 2:
-			fp->inst[counter].inst1 |= R500_RGB_ADDR0(make_src(fp, fpi->SrcReg[one]));
-			fp->inst[counter].inst2 |= R500_ALPHA_ADDR0(make_src(fp, fpi->SrcReg[one]));
-			fp->inst[counter].inst3 |= R500_ALU_RGB_SEL_A_SRC0
-				| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[one]));
-			fp->inst[counter].inst4 |= R500_ALPHA_SEL_A_SRC0
-				| MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[one]));
-			break;
-		case R500_SWIZZLE_ZERO:
-			fp->inst[counter].inst3 |= MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ZERO);
-			fp->inst[counter].inst4 |= MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ZERO);
-			break;
-		case R500_SWIZZLE_ONE:
-			fp->inst[counter].inst3 |= MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE);
-			fp->inst[counter].inst4 |= MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE);
-			break;
-		default:
-			ERROR("Bad src index in emit_mad: %d\n", one);
-			break;
-	}
-	switch (two) {
-		case 0:
-		case 1:
-		case 2:
-			fp->inst[counter].inst1 |= R500_RGB_ADDR1(make_src(fp, fpi->SrcReg[two]));
-			fp->inst[counter].inst2 |= R500_ALPHA_ADDR1(make_src(fp, fpi->SrcReg[two]));
-			fp->inst[counter].inst3 |= R500_ALU_RGB_SEL_B_SRC1
-				| MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[two]));
-			fp->inst[counter].inst4 |= R500_ALPHA_SEL_B_SRC1
-				| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[two]));
-			break;
-		case R500_SWIZZLE_ZERO:
-			fp->inst[counter].inst3 |= MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ZERO);
-			fp->inst[counter].inst4 |= MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ZERO);
-			break;
-		case R500_SWIZZLE_ONE:
-			fp->inst[counter].inst3 |= MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ONE);
-			fp->inst[counter].inst4 |= MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ONE);
-			break;
-		default:
-			ERROR("Bad src index in emit_mad: %d\n", two);
-			break;
-	}
-	switch (three) {
-		case 0:
-		case 1:
-		case 2:
-			fp->inst[counter].inst1 |= R500_RGB_ADDR2(make_src(fp, fpi->SrcReg[three]));
-			fp->inst[counter].inst2 |= R500_ALPHA_ADDR2(make_src(fp, fpi->SrcReg[three]));
-			fp->inst[counter].inst5 |= R500_ALU_RGBA_SEL_C_SRC2
-				| MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi->SrcReg[three]))
-				| R500_ALU_RGBA_ALPHA_SEL_C_SRC2
-				| MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi->SrcReg[three]));
-			break;
-		case R500_SWIZZLE_ZERO:
-			fp->inst[counter].inst5 |= MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
-				| MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
-			break;
-		case R500_SWIZZLE_ONE:
-			fp->inst[counter].inst5 |= MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ONE)
-			| MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ONE);
-			break;
-		default:
-			ERROR("Bad src index in emit_mad: %d\n", three);
-			break;
-	}
-}
 
-static void emit_sop(struct r500_fragment_program *fp, int counter, struct prog_instruction *fpi, int opcode, GLuint src, GLuint swiz, GLuint dest) {
-	emit_alu(fp, counter, fpi);
-	fp->inst[counter].inst1 = R500_RGB_ADDR0(src);
-	fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src);
-	fp->inst[counter].inst4 |= R500_ALPHA_ADDRD(dest)
-		| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(swiz);
-	fp->inst[counter].inst5 = R500_ALU_RGBA_OP_SOP
-		| R500_ALU_RGBA_ADDRD(dest);
-	switch (opcode) {
-		case OPCODE_COS:
-			fp->inst[counter].inst4 |= R500_ALPHA_OP_COS;
-			break;
-		case OPCODE_EX2:
-			fp->inst[counter].inst4 |= R500_ALPHA_OP_EX2;
-			break;
-		case OPCODE_LG2:
-			fp->inst[counter].inst4 |= R500_ALPHA_OP_LN2;
-			break;
-		case OPCODE_RCP:
-			fp->inst[counter].inst4 |= R500_ALPHA_OP_RCP;
-			break;
-		case OPCODE_RSQ:
-			fp->inst[counter].inst4 |= R500_ALPHA_OP_RSQ;
-			break;
-		case OPCODE_SIN:
-			fp->inst[counter].inst4 |= R500_ALPHA_OP_SIN;
-			break;
-		default:
-			ERROR("Bad opcode in emit_sop: %d\n", opcode);
-			break;
+static GLuint build_dtm(GLuint depthmode)
+{
+	switch(depthmode) {
+	default:
+	case GL_LUMINANCE: return 0;
+	case GL_INTENSITY: return 1;
+	case GL_ALPHA: return 2;
 	}
 }
 
-static GLboolean parse_program(struct r500_fragment_program *fp)
+static GLuint build_func(GLuint comparefunc)
 {
-	struct gl_fragment_program *mp = &fp->mesa_program;
-	const struct prog_instruction *inst = mp->Base.Instructions;
-	struct prog_instruction *fpi;
-	GLuint src[3], dest = 0;
-	int temp_swiz, counter = 0;
+	return comparefunc - GL_NEVER;
+}
 
-	if (!inst || inst[0].Opcode == OPCODE_END) {
-		ERROR("The program is empty!\n");
-		return GL_FALSE;
-	}
 
-	for (fpi = mp->Base.Instructions; fpi->Opcode != OPCODE_END; fpi++) {
+/**
+ * Collect all external state that is relevant for compiling the given
+ * fragment program.
+ */
+static void build_state(
+	r300ContextPtr r300,
+	struct r500_fragment_program *fp,
+	struct r500_fragment_program_external_state *state)
+{
+	int unit;
 
-		if (fpi->Opcode != OPCODE_KIL) {
-			dest = make_dest(fp, fpi->DstReg);
-		}
+	_mesa_bzero(state, sizeof(*state));
 
-		switch (fpi->Opcode) {
-			case OPCODE_ABS:
-				emit_mov(fp, counter, fpi, make_src(fp, fpi->SrcReg[0]), fpi->SrcReg[0].Swizzle, dest);
-				fp->inst[counter].inst3 |= R500_ALU_RGB_MOD_A_ABS
-					| R500_ALU_RGB_MOD_B_ABS;
-				fp->inst[counter].inst4 |= R500_ALPHA_MOD_A_ABS
-					| R500_ALPHA_MOD_B_ABS;
-				break;
-			case OPCODE_ADD:
-				/* Variation on MAD: 1*src0+src1 */
-				emit_mad(fp, counter, fpi, R500_SWIZZLE_ONE, 0, 1);
-				break;
-		        case OPCODE_CMP:
-				/* This inst's selects need to be swapped as follows:
-				 * 0 -> C ; 1 -> B ; 2 -> A */
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = make_src(fp, fpi->SrcReg[1]);
-				src[2] = make_src(fp, fpi->SrcReg[2]);
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[2])
-					| R500_RGB_ADDR1(src[1]) | R500_RGB_ADDR2(src[0]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[2])
-					| R500_ALPHA_ADDR1(src[1]) | R500_ALPHA_ADDR2(src[0]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[2]))
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_CMP
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[2]))
-					| R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_CMP
-					| R500_ALU_RGBA_ADDRD(dest)
-					| R500_ALU_RGBA_SEL_C_SRC2
-					| MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi->SrcReg[0]))
-					| R500_ALU_RGBA_ALPHA_SEL_C_SRC2
-					| MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi->SrcReg[0]));
-				break;
-			case OPCODE_COS:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = emit_const4fv(fp, RCP_2PI);
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
-					| (R500_WRITEMASK_ARGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
-					| R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
-					| R500_ALPHA_ADDR1(src[1]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB)
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB);
-				fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(get_temp(fp, 0))
-					| R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A
-					| R500_ALPHA_SEL_B_SRC1 | R500_ALPHA_SWIZ_B_A;
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
-					| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
-					| MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
-				counter++;
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | (R500_WRITEMASK_ARGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB);
-				fp->inst[counter].inst4 = R500_ALPHA_OP_FRC
-					| R500_ALPHA_ADDRD(get_temp(fp, 1))
-					| R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A;
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_FRC
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 1));
-				counter++;
-				emit_sop(fp, counter, fpi, OPCODE_COS, get_temp(fp, 1), make_sop_swizzle(fpi->SrcReg[0]), dest);
-				break;
-			case OPCODE_DP3:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = make_src(fp, fpi->SrcReg[1]);
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
-					| R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
-					| R500_ALPHA_ADDR1(src[1]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_DP
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
-					| R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_DP3
-					| R500_ALU_RGBA_ADDRD(dest);
-				break;
-			case OPCODE_DP4:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = make_src(fp, fpi->SrcReg[1]);
-				/* Based on DP3 */
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
-					| R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
-					| R500_ALPHA_ADDR1(src[1]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_DP
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
-					| R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_DP4
-					| R500_ALU_RGBA_ADDRD(dest);
-				break;
-			case OPCODE_DPH:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = make_src(fp, fpi->SrcReg[1]);
-				/* Based on DP3 */
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
-					| R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
-					| R500_ALPHA_ADDR1(src[1]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_DP
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE)
-					| R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_DP4
-					| R500_ALU_RGBA_ADDRD(dest);
-				break;
-			case OPCODE_DST:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = make_src(fp, fpi->SrcReg[1]);
-				/* [1, src0.y*src1.y, src0.z, src1.w]
-				 * So basically MUL with lotsa swizzling. */
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
-					| R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
-					| R500_ALPHA_ADDR1(src[1]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| R500_ALU_RGB_SEL_B_SRC1;
-				/* Select [1, y, z, 1] */
-				temp_swiz = (make_rgb_swizzle(fpi->SrcReg[0]) & ~0x7) | R500_SWIZZLE_ONE;
-				fp->inst[counter].inst3 |= MAKE_SWIZ_RGB_A(temp_swiz);
-				/* Select [1, y, 1, w] */
-				temp_swiz = (make_rgb_swizzle(fpi->SrcReg[0]) & ~0x1c7) | R500_SWIZZLE_ONE | (R500_SWIZZLE_ONE << 6);
-				fp->inst[counter].inst3 |= MAKE_SWIZ_RGB_B(temp_swiz);
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE)
-					| R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(dest)
-					| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
-					| MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
-				break;
-			case OPCODE_EX2:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				emit_sop(fp, counter, fpi, OPCODE_EX2, src[0], make_sop_swizzle(fpi->SrcReg[0]), dest);
-				break;
-			case OPCODE_FLR:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | (R500_WRITEMASK_ARGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]));
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_FRC
-					| R500_ALPHA_ADDRD(get_temp(fp, 0))
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_FRC
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 0));
-				counter++;
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
-					| R500_RGB_ADDR1(get_temp(fp, 0));
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
-					| R500_ALPHA_ADDR1(get_temp(fp, 0));
-				fp->inst[counter].inst3 = MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE)
-					| R500_ALU_RGB_SEL_B_SRC0 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[0]));
-				fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SWIZ_A_A
-					| R500_ALPHA_SEL_B_SRC0 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[0]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(dest)
-					| R500_ALU_RGBA_SEL_C_SRC1
-					| MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi->SrcReg[0]))
-					| R500_ALU_RGBA_ALPHA_SEL_C_SRC1
-					| MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi->SrcReg[0]))
-					| R500_ALU_RGBA_MOD_C_NEG;
-				break;
-			case OPCODE_FRC:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]));
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_FRC
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_FRC
-					| R500_ALU_RGBA_ADDRD(dest);
-				break;
-			case OPCODE_LG2:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				emit_sop(fp, counter, fpi, OPCODE_LG2, src[0], make_sop_swizzle(fpi->SrcReg[0]), dest);
-				break;
-			case OPCODE_LIT:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = emit_const4fv(fp, LIT);
-				/* First inst: MAX temp, input, [0, 0, 0, -128]
-				 * Write: RG, A  */
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
-					| (R500_WRITEMASK_ARG << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]) | R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]) | R500_ALPHA_ADDR1(src[1]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
-					| MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ZERO);
-				fp->inst[counter].inst4 = R500_ALPHA_OP_MAX
-					| R500_ALPHA_ADDRD(get_temp(fp, 0))
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
-					| R500_ALPHA_SEL_B_SRC1 | R500_ALPHA_SWIZ_B_A;
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAX
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 0));
-				counter++;
-				/* Second inst: MIN temp, temp, [x, x, x, 128]
-				 * Write: A */
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | (R500_WRITEMASK_A << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0)) | R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0)) | R500_ALPHA_ADDR1(src[1]);
-				/* fp->inst[counter].inst3; */
-				fp->inst[counter].inst4 = R500_ALPHA_OP_MAX
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A
-					| R500_ALPHA_SEL_B_SRC1 | R500_ALPHA_SWIZ_B_A;
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAX
-					| R500_ALU_RGBA_ADDRD(dest);
-				counter++;
-				/* Third-fifth insts: POW temp, temp.y, temp.w
-				 * Write: B */
-				emit_sop(fp, counter, fpi, OPCODE_LG2, get_temp(fp, 0), SWIZZLE_Y, get_temp(fp, 1));
-				fp->inst[counter].inst0 |= (R500_WRITEMASK_ARGB << 11);
-				counter++;
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | (R500_WRITEMASK_ARGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 1))
-					| R500_RGB_ADDR1(get_temp(fp, 0));
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 1))
-					| R500_ALPHA_ADDR1(get_temp(fp, 0));
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB)
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB);
-				fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(get_temp(fp, 1))
-					| R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A
-					| R500_ALPHA_SEL_B_SRC1 | R500_ALPHA_SWIZ_B_A;
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 1))
-					| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
-					| MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
-				counter++;
-				emit_sop(fp, counter, fpi, OPCODE_EX2, get_temp(fp, 1), SWIZZLE_W, get_temp(fp, 0));
-				fp->inst[counter].inst0 |= (R500_WRITEMASK_B << 11);
-				counter++;
-				/* Sixth inst: CMP dest, temp.xxxx, temp.[1, x, z, 1], temp.[1, x, 0, 1];
-				 * Write: ARGB
-				 * This inst's selects need to be swapped as follows:
-				 * 0 -> C ; 1 -> B ; 2 -> A */
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| R500_ALU_RGB_R_SWIZ_A_1
-					| R500_ALU_RGB_G_SWIZ_A_R
-					| R500_ALU_RGB_B_SWIZ_A_B
-					| R500_ALU_RGB_SEL_B_SRC0
-					| R500_ALU_RGB_R_SWIZ_B_1
-					| R500_ALU_RGB_G_SWIZ_B_R
-					| R500_ALU_RGB_B_SWIZ_B_0;
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_CMP
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_1
-					| R500_ALPHA_SEL_B_SRC0 | R500_ALPHA_SWIZ_B_1;
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_CMP
-					| R500_ALU_RGBA_ADDRD(dest)
-					| R500_ALU_RGBA_SEL_C_SRC0
-					| R500_ALU_RGBA_ALPHA_SEL_C_SRC0
-					| R500_ALU_RGBA_R_SWIZ_R
-					| R500_ALU_RGBA_G_SWIZ_R
-					| R500_ALU_RGBA_B_SWIZ_R
-					| R500_ALU_RGBA_A_SWIZ_R;
-				break;
-			case OPCODE_LRP:
-				/* src0 * src1 + INV(src0) * src2
-				 * 1) MUL src0, src1, temp
-				 * 2) PRE 1-src0; MAD srcp, src2, temp */
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = make_src(fp, fpi->SrcReg[1]);
-				src[2] = make_src(fp, fpi->SrcReg[2]);
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
-					| R500_INST_NOP | (R500_WRITEMASK_ARGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
-					| R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
-					| R500_ALPHA_ADDR1(src[1]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(get_temp(fp, 0))
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
-					| R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
-					| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
-					| MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
-				counter++;
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
-					| R500_RGB_ADDR1(src[2])
-					| R500_RGB_ADDR2(get_temp(fp, 0))
-					| R500_RGB_SRCP_OP_1_MINUS_RGB0;
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
-					| R500_ALPHA_ADDR1(src[2])
-					| R500_ALPHA_ADDR2(get_temp(fp, 0))
-					| R500_ALPHA_SRCP_OP_1_MINUS_A0;
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRCP
-					| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB);
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRCP | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
-					| R500_ALPHA_SEL_B_SRC1 | R500_ALPHA_SWIZ_B_A;
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(dest)
-					| R500_ALU_RGBA_SEL_C_SRC2 | MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi->SrcReg[2]))
-					| R500_ALU_RGBA_ALPHA_SEL_C_SRC2
-					| MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi->SrcReg[2]));
-				break;
-			case OPCODE_MAD:
-				emit_mad(fp, counter, fpi, 0, 1, 2);
-				break;
-			case OPCODE_MAX:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = make_src(fp, fpi->SrcReg[1]);
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]) | R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]) | R500_ALPHA_ADDR1(src[1]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
-					| R500_ALU_RGB_SEL_B_SRC1
-					| MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_MAX
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
-					| R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAX
-					| R500_ALU_RGBA_ADDRD(dest);
-				break;
-			case OPCODE_MIN:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = make_src(fp, fpi->SrcReg[1]);
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]) | R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]) | R500_ALPHA_ADDR1(src[1]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
-					| R500_ALU_RGB_SEL_B_SRC1
-					| MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_MIN
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
-					| R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MIN
-					| R500_ALU_RGBA_ADDRD(dest);
-				break;
-			case OPCODE_MOV:
-				emit_mov(fp, counter, fpi, make_src(fp, fpi->SrcReg[0]), fpi->SrcReg[0].Swizzle, dest);
-				break;
-			case OPCODE_MUL:
-				/* Variation on MAD: src0*src1+0 */
-				emit_mad(fp, counter, fpi, 0, 1, R500_SWIZZLE_ZERO);
-				break;
-			case OPCODE_POW:
-				/* POW(a,b) = EX2(LN2(a)*b) */
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = make_src(fp, fpi->SrcReg[1]);
-				emit_sop(fp, counter, fpi, OPCODE_LG2, src[0], make_sop_swizzle(fpi->SrcReg[0]), get_temp(fp, 0));
-				fp->inst[counter].inst0 |= (R500_WRITEMASK_ARGB << 11);
-				counter++;
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | (R500_WRITEMASK_ARGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0))
-					| R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0))
-					| R500_ALPHA_ADDR1(src[1]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(get_temp(fp, 1))
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
-					| R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 1))
-					| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
-					| MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
-				counter++;
-				emit_sop(fp, counter, fpi, OPCODE_EX2, get_temp(fp, 1), make_sop_swizzle(fpi->SrcReg[0]), dest);
-				break;
-			case OPCODE_RCP:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				emit_sop(fp, counter, fpi, OPCODE_RCP, src[0], make_sop_swizzle(fpi->SrcReg[0]), dest);
-				break;
-			case OPCODE_RSQ:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				emit_sop(fp, counter, fpi, OPCODE_RSQ, src[0], make_sop_swizzle(fpi->SrcReg[0]), dest);
-				break;
-			case OPCODE_SCS:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = emit_const4fv(fp, RCP_2PI);
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
-					| (R500_WRITEMASK_ARGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
-					| R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
-					| R500_ALPHA_ADDR1(src[1]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB)
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB);
-				fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(get_temp(fp, 0))
-					| R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A
-					| R500_ALPHA_SEL_B_SRC1 | R500_ALPHA_SWIZ_B_A;
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
-					| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
-					| MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
-				counter++;
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | (R500_WRITEMASK_ARGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB);
-				fp->inst[counter].inst4 = R500_ALPHA_OP_FRC
-					| R500_ALPHA_ADDRD(get_temp(fp, 1))
-					| R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A;
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_FRC
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 1));
-				counter++;
-				/* Do a cosine, then a sine, masking out the channels we want to protect. */
-				/* Cosine only goes in R (x) channel. */
-				fpi->DstReg.WriteMask = 0x1;
-				emit_sop(fp, counter, fpi, OPCODE_COS, get_temp(fp, 1), make_sop_swizzle(fpi->SrcReg[0]), dest);
-				counter++;
-				/* Sine only goes in G (y) channel. */
-				fpi->DstReg.WriteMask = 0x2;
-				emit_sop(fp, counter, fpi, OPCODE_SIN, get_temp(fp, 1), make_sop_swizzle(fpi->SrcReg[0]), dest);
-				break;
-			case OPCODE_SGE:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = make_src(fp, fpi->SrcReg[1]);
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
-					| (R500_WRITEMASK_ARGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR1(src[0])
-					| R500_RGB_ADDR2(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR1(src[0])
-					| R500_ALPHA_ADDR2(src[1]);
-				fp->inst[counter].inst3 = /* 1 */
-					MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE)
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[0]));
-				fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(get_temp(fp, 0))
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE)
-					| R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[0]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
-					| R500_ALU_RGBA_SEL_C_SRC2
-					| MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi->SrcReg[1]))
-					| R500_ALU_RGBA_MOD_C_NEG
-					| R500_ALU_RGBA_ALPHA_SEL_C_SRC2
-					| MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi->SrcReg[1]))
-					| R500_ALU_RGBA_ALPHA_MOD_C_NEG;
-				counter++;
-				/* This inst's selects need to be swapped as follows:
-				 * 0 -> C ; 1 -> B ; 2 -> A */
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE)
-					| R500_ALU_RGB_SEL_B_SRC0
-					| MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ZERO);
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_CMP
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE)
-					| R500_ALPHA_SEL_B_SRC0 | MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ZERO);
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_CMP
-					| R500_ALU_RGBA_ADDRD(dest)
-					| R500_ALU_RGBA_SEL_C_SRC0
-					| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_RGB)
-					| R500_ALU_RGBA_ALPHA_SEL_C_SRC0
-					| R500_ALU_RGBA_A_SWIZ_A;
-				break;
-			case OPCODE_SIN:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = emit_const4fv(fp, RCP_2PI);
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
-					| (R500_WRITEMASK_ARGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
-					| R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
-					| R500_ALPHA_ADDR1(src[1]);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB)
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB);
-				fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(get_temp(fp, 0))
-					| R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A
-					| R500_ALPHA_SEL_B_SRC1 | R500_ALPHA_SWIZ_B_A;
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
-					| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
-					| MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
-				counter++;
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | (R500_WRITEMASK_ARGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB);
-				fp->inst[counter].inst4 = R500_ALPHA_OP_FRC
-					| R500_ALPHA_ADDRD(get_temp(fp, 1))
-					| R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A;
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_FRC
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 1));
-				counter++;
-				emit_sop(fp, counter, fpi, OPCODE_SIN, get_temp(fp, 1), make_sop_swizzle(fpi->SrcReg[0]), dest);
-				break;
-			case OPCODE_SLT:
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = make_src(fp, fpi->SrcReg[1]);
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
-					| (R500_WRITEMASK_ARGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR1(src[0])
-					| R500_RGB_ADDR2(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR1(src[0])
-					| R500_ALPHA_ADDR2(src[1]);
-				fp->inst[counter].inst3 = /* 1 */
-					MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE)
-					| R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[0]));
-				fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(get_temp(fp, 0))
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE)
-					| R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[0]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
-					| R500_ALU_RGBA_SEL_C_SRC2
-					| MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi->SrcReg[1]))
-					| R500_ALU_RGBA_MOD_C_NEG
-					| R500_ALU_RGBA_ALPHA_SEL_C_SRC2
-					| MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi->SrcReg[1]))
-					| R500_ALU_RGBA_ALPHA_MOD_C_NEG;
-				counter++;
-				/* This inst's selects need to be swapped as follows:
-				 * 0 -> C ; 1 -> B ; 2 -> A */
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ZERO)
-					| R500_ALU_RGB_SEL_B_SRC0
-					| MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ONE);
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_CMP
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ZERO)
-					| R500_ALPHA_SEL_B_SRC0 | MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ONE);
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_CMP
-					| R500_ALU_RGBA_ADDRD(dest)
-					| R500_ALU_RGBA_SEL_C_SRC0
-					| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_RGB)
-					| R500_ALU_RGBA_ALPHA_SEL_C_SRC0
-					| R500_ALU_RGBA_A_SWIZ_A;
-				break;
-			case OPCODE_SUB:
-				/* Variation on MAD: 1*src0-src1 */
-				fpi->SrcReg[1].NegateBase = 0xF; /* NEG_XYZW */
-				emit_mad(fp, counter, fpi, R500_SWIZZLE_ONE, 0, 1);
-				break;
-			case OPCODE_SWZ:
-				/* TODO: The rarer negation masks! */
-				emit_mov(fp, counter, fpi, make_src(fp, fpi->SrcReg[0]), fpi->SrcReg[0].Swizzle, dest);
-				break;
-			case OPCODE_XPD:
-				/* src0 * src1 - src1 * src0
-				 * 1) MUL temp.xyz, src0.yzx, src1.zxy
-				 * 2) MAD src0.zxy, src1.yzx, -temp.xyz */
-				src[0] = make_src(fp, fpi->SrcReg[0]);
-				src[1] = make_src(fp, fpi->SrcReg[1]);
-				fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
-					| (R500_WRITEMASK_RGB << 11);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
-					| R500_RGB_ADDR1(src[1]);
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
-					| R500_ALPHA_ADDR1(src[1]);
-				/* Select [y, z, x] */
-				temp_swiz = make_rgb_swizzle(fpi->SrcReg[0]);
-				temp_swiz = (GET_SWZ(temp_swiz, 1) << 0) | (GET_SWZ(temp_swiz, 2) << 3) | (GET_SWZ(temp_swiz, 0) << 6);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(temp_swiz);
-				/* Select [z, x, y] */
-				temp_swiz = make_rgb_swizzle(fpi->SrcReg[1]);
-				temp_swiz = (GET_SWZ(temp_swiz, 2) << 0) | (GET_SWZ(temp_swiz, 0) << 3) | (GET_SWZ(temp_swiz, 1) << 6);
-				fp->inst[counter].inst3 |= R500_ALU_RGB_SEL_B_SRC1
-					| MAKE_SWIZ_RGB_B(temp_swiz);
-				fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(get_temp(fp, 0))
-					| R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
-					| R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
-					| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
-					| MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
-				counter++;
-				emit_alu(fp, counter, fpi);
-				fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
-					| R500_RGB_ADDR1(src[1])
-					| R500_RGB_ADDR2(get_temp(fp, 0));
-				fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
-					| R500_ALPHA_ADDR1(src[1])
-					| R500_ALPHA_ADDR2(get_temp(fp, 0));
-				/* Select [z, x, y] */
-				temp_swiz = make_rgb_swizzle(fpi->SrcReg[0]);
-				temp_swiz = (GET_SWZ(temp_swiz, 2) << 0) | (GET_SWZ(temp_swiz, 0) << 3) | (GET_SWZ(temp_swiz, 1) << 6);
-				fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
-					| MAKE_SWIZ_RGB_A(temp_swiz);
-				/* Select [y, z, x] */
-				temp_swiz = make_rgb_swizzle(fpi->SrcReg[1]);
-				temp_swiz = (GET_SWZ(temp_swiz, 1) << 0) | (GET_SWZ(temp_swiz, 2) << 3) | (GET_SWZ(temp_swiz, 0) << 6);
-				fp->inst[counter].inst3 |= R500_ALU_RGB_SEL_B_SRC1
-					| MAKE_SWIZ_RGB_B(temp_swiz);
-				fp->inst[counter].inst4 |= R500_ALPHA_OP_MAD
-					| R500_ALPHA_ADDRD(dest)
-					| R500_ALPHA_SWIZ_A_1
-					| R500_ALPHA_SWIZ_B_1;
-				fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
-					| R500_ALU_RGBA_ADDRD(dest)
-					| R500_ALU_RGBA_SEL_C_SRC2
-					| MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_RGB)
-					| R500_ALU_RGBA_MOD_C_NEG
-					| R500_ALU_RGBA_A_SWIZ_0;
-				break;
-			case OPCODE_KIL:
-			case OPCODE_TEX:
-			case OPCODE_TXB:
-			case OPCODE_TXP:
-				emit_tex(fp, fpi, dest, counter);
-					if (fpi->DstReg.File == PROGRAM_OUTPUT)
-						counter++;
-				break;
-			default:
-			        ERROR("unknown fpi->Opcode %s\n", _mesa_opcode_string(fpi->Opcode));
-				break;
-		}
+	for(unit = 0; unit < 16; ++unit) {
+		if (fp->mesa_program.Base.ShadowSamplers & (1 << unit)) {
+			struct gl_texture_object* tex = r300->radeon.glCtx->Texture.Unit[unit]._Current;
 
-		/* Finishing touches */
-		if (fpi->SaturateMode == SATURATE_ZERO_ONE) {
-			fp->inst[counter].inst0 |= R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP;
+			state->unit[unit].depth_texture_mode = build_dtm(tex->DepthMode);
+			state->unit[unit].texture_compare_func = build_func(tex->CompareFunc);
 		}
-
-		counter++;
-
-		if (fp->error)
-			return GL_FALSE;
-
-	}
-
-	/* Finish him! (If it's an ALU/OUT instruction...) */
-	if ((fp->inst[counter-1].inst0 & 0x3) == 1) {
-		fp->inst[counter-1].inst0 |= R500_INST_LAST;
-	} else {
-		/* We still need to put an output inst, right? */
-		WARN_ONCE("Final FP instruction is not an OUT.\n");
 	}
-
-	fp->cs->nrslots = counter;
-
-	fp->max_temp_idx++;
-
-	return GL_TRUE;
 }
 
-static void init_program(r300ContextPtr r300, struct r500_fragment_program *fp)
-{
-	struct r500_pfs_compile_state *cs = fp->cs;
-	struct gl_fragment_program *mp = &fp->mesa_program;
-	struct prog_instruction *fpi;
-	GLuint InputsRead = mp->Base.InputsRead;
-	GLuint temps_used = 0;
-	int i, j;
-
-	/* New compile, reset tracking data */
-	fp->optimization =
-	    driQueryOptioni(&r300->radeon.optionCache, "fp_optimization");
-	fp->translated = GL_FALSE;
-	fp->error = GL_FALSE;
-	fp->const_nr = 0;
-	/* Size of pixel stack, plus 1. */
-	fp->max_temp_idx = 1;
-	/* Temp register offset. */
-	fp->temp_reg_offset = 0;
-	/* Whether or not we perform any depth writing. */
-	fp->writes_depth = GL_FALSE;
-
-	_mesa_memset(cs, 0, sizeof(*fp->cs));
-	for (i = 0; i < PFS_MAX_ALU_INST; i++) {
-		for (j = 0; j < 3; j++) {
-			cs->slot[i].vsrc[j] = SRC_CONST;
-			cs->slot[i].ssrc[j] = SRC_CONST;
-		}
-	}
-
-	/* Work out what temps the Mesa inputs correspond to, this must match
-	 * what setup_rs_unit does, which shouldn't be a problem as rs_unit
-	 * configures itself based on the fragprog's InputsRead
-	 *
-	 * NOTE: this depends on get_hw_temp() allocating registers in order,
-	 * starting from register 0, so we're just going to do that instead.
-	 */
+static void dump_program(struct r500_fragment_program_code *code);
 
-	/* Texcoords come first */
-	for (i = 0; i < fp->ctx->Const.MaxTextureUnits; i++) {
-		if (InputsRead & (FRAG_BIT_TEX0 << i)) {
-			cs->inputs[FRAG_ATTRIB_TEX0 + i].refcount = 0;
-			cs->inputs[FRAG_ATTRIB_TEX0 + i].reg =
-				fp->temp_reg_offset;
-			fp->temp_reg_offset++;
-		}
-	}
-	InputsRead &= ~FRAG_BITS_TEX_ANY;
-
-	/* fragment position treated as a texcoord */
-	if (InputsRead & FRAG_BIT_WPOS) {
-		cs->inputs[FRAG_ATTRIB_WPOS].refcount = 0;
-		cs->inputs[FRAG_ATTRIB_WPOS].reg =
-			fp->temp_reg_offset;
-		fp->temp_reg_offset++;
-	}
-	InputsRead &= ~FRAG_BIT_WPOS;
-
-	/* Then primary colour */
-	if (InputsRead & FRAG_BIT_COL0) {
-		cs->inputs[FRAG_ATTRIB_COL0].refcount = 0;
-		cs->inputs[FRAG_ATTRIB_COL0].reg =
-			fp->temp_reg_offset;
-		fp->temp_reg_offset++;
-	}
-	InputsRead &= ~FRAG_BIT_COL0;
-
-	/* Secondary color */
-	if (InputsRead & FRAG_BIT_COL1) {
-		cs->inputs[FRAG_ATTRIB_COL1].refcount = 0;
-		cs->inputs[FRAG_ATTRIB_COL1].reg =
-			fp->temp_reg_offset;
-		fp->temp_reg_offset++;
-	}
-	InputsRead &= ~FRAG_BIT_COL1;
-
-	/* Anything else */
-	if (InputsRead) {
-		WARN_ONCE("Don't know how to handle inputs 0x%x\n", InputsRead);
-		/* force read from hwreg 0 for now */
-		for (i = 0; i < 32; i++)
-			if (InputsRead & (1 << i))
-				cs->inputs[i].reg = 0;
-	}
+void r500TranslateFragmentShader(r300ContextPtr r300,
+				 struct r500_fragment_program *fp)
+{
+	struct r500_fragment_program_external_state state;
 
-	if (!mp->Base.Instructions) {
-		ERROR("No instructions found in program, going to go die now.\n");
-		return;
+	build_state(r300, fp, &state);
+	if (_mesa_memcmp(&fp->state, &state, sizeof(state))) {
+		/* TODO: cache compiled programs */
+		fp->translated = GL_FALSE;
+		_mesa_memcpy(&fp->state, &state, sizeof(state));
 	}
 
-	for (fpi = mp->Base.Instructions; fpi->Opcode != OPCODE_END; fpi++) {
-		for (i = 0; i < 3; i++) {
-			if (fpi->SrcReg[i].File == PROGRAM_TEMPORARY) {
-				if (fpi->SrcReg[i].Index >= temps_used)
-					temps_used = fpi->SrcReg[i].Index + 1;
-			}
-		}
-	}
+	if (!fp->translated) {
+		struct r500_fragment_program_compiler compiler;
 
-	cs->temp_in_use = temps_used + 1;
+		compiler.r300 = r300;
+		compiler.fp = fp;
+		compiler.code = &fp->code;
 
-	fp->max_temp_idx = fp->temp_reg_offset + cs->temp_in_use;
+		radeonCompilerInit(&compiler.compiler, r300->radeon.glCtx, &fp->mesa_program.Base);
 
-	if (RADEON_DEBUG & DEBUG_PIXEL)
-		fprintf(stderr, "FP temp indices: fp->max_temp_idx: %d cs->temp_in_use: %d\n", fp->max_temp_idx, cs->temp_in_use);
-}
+		insert_WPOS_trailer(&compiler);
 
-static void update_params(struct r500_fragment_program *fp)
-{
-	struct gl_fragment_program *mp = &fp->mesa_program;
+		struct radeon_program_transformation transformations[1] = {
+			{ &transform_TEX, &compiler }
+		};
+		radeonClauseLocalTransform(&compiler.compiler,
+			&compiler.compiler.Clauses[0],
+			1, transformations);
 
-	/* Ask Mesa nicely to fill in ParameterValues for us */
-	if (mp->Base.Parameters)
-		_mesa_load_state_parameters(fp->ctx, mp->Base.Parameters);
-}
-
-static void dumb_shader(struct r500_fragment_program *fp)
-{
-	fp->inst[0].inst0 = R500_INST_TYPE_TEX
-		| R500_INST_TEX_SEM_WAIT
-		| R500_INST_RGB_WMASK_R
-		| R500_INST_RGB_WMASK_G
-		| R500_INST_RGB_WMASK_B
-		| R500_INST_ALPHA_WMASK
-		| R500_INST_RGB_CLAMP
-		| R500_INST_ALPHA_CLAMP;
-	fp->inst[0].inst1 = R500_TEX_ID(0)
-		| R500_TEX_INST_LD
-		| R500_TEX_SEM_ACQUIRE
-		| R500_TEX_IGNORE_UNCOVERED;
-	fp->inst[0].inst2 = R500_TEX_SRC_ADDR(0)
-		| R500_TEX_SRC_S_SWIZ_R
-		| R500_TEX_SRC_T_SWIZ_G
-		| R500_TEX_DST_ADDR(0)
-		| R500_TEX_DST_R_SWIZ_R
-		| R500_TEX_DST_G_SWIZ_G
-		| R500_TEX_DST_B_SWIZ_B
-		| R500_TEX_DST_A_SWIZ_A;
-	fp->inst[0].inst3 = R500_DX_ADDR(0)
-		| R500_DX_S_SWIZ_R
-		| R500_DX_T_SWIZ_R
-		| R500_DX_R_SWIZ_R
-		| R500_DX_Q_SWIZ_R
-		| R500_DY_ADDR(0)
-		| R500_DY_S_SWIZ_R
-		| R500_DY_T_SWIZ_R
-		| R500_DY_R_SWIZ_R
-		| R500_DY_Q_SWIZ_R;
-	fp->inst[0].inst4 = 0x0;
-	fp->inst[0].inst5 = 0x0;
-
-	fp->inst[1].inst0 = R500_INST_TYPE_OUT |
-		R500_INST_TEX_SEM_WAIT |
-		R500_INST_LAST |
-		R500_INST_RGB_OMASK_R |
-		R500_INST_RGB_OMASK_G |
-		R500_INST_RGB_OMASK_B |
-		R500_INST_ALPHA_OMASK;
-	fp->inst[1].inst1 = R500_RGB_ADDR0(0) |
-		R500_RGB_ADDR1(0) |
-		R500_RGB_ADDR1_CONST |
-		R500_RGB_ADDR2(0) |
-		R500_RGB_ADDR2_CONST |
-		R500_RGB_SRCP_OP_1_MINUS_2RGB0;
-	fp->inst[1].inst2 = R500_ALPHA_ADDR0(0) |
-		R500_ALPHA_ADDR1(0) |
-		R500_ALPHA_ADDR1_CONST |
-		R500_ALPHA_ADDR2(0) |
-		R500_ALPHA_ADDR2_CONST |
-		R500_ALPHA_SRCP_OP_1_MINUS_2A0;
-	fp->inst[1].inst3 = R500_ALU_RGB_SEL_A_SRC0 |
-		R500_ALU_RGB_R_SWIZ_A_R |
-		R500_ALU_RGB_G_SWIZ_A_G |
-		R500_ALU_RGB_B_SWIZ_A_B |
-		R500_ALU_RGB_SEL_B_SRC0 |
-		R500_ALU_RGB_R_SWIZ_B_1 |
-		R500_ALU_RGB_B_SWIZ_B_1 |
-		R500_ALU_RGB_G_SWIZ_B_1;
-	fp->inst[1].inst4 = R500_ALPHA_OP_MAD |
-		R500_ALPHA_SWIZ_A_A |
-		R500_ALPHA_SWIZ_B_1;
-	fp->inst[1].inst5 = R500_ALU_RGBA_OP_MAD |
-		R500_ALU_RGBA_R_SWIZ_0 |
-		R500_ALU_RGBA_G_SWIZ_0 |
-		R500_ALU_RGBA_B_SWIZ_0 |
-		R500_ALU_RGBA_A_SWIZ_0;
-
-	fp->cs->nrslots = 2;
-	fp->translated = GL_TRUE;
-}
+		if (RADEON_DEBUG & DEBUG_PIXEL) {
+			_mesa_printf("Compiler state after transformations:\n");
+			radeonCompilerDump(&compiler.compiler);
+		}
 
-void r500TranslateFragmentShader(r300ContextPtr r300,
-				 struct r500_fragment_program *fp)
-{
-	if (!fp->translated) {
-		struct r500_pfs_compile_state cs;
-		fp->cs = &cs;
+		if (!r500FragmentProgramEmit(&compiler))
+			fp->error = GL_TRUE;
 
-		init_program(r300, fp);
+		radeonCompilerCleanup(&compiler.compiler);
 
-		if (parse_program(fp) == GL_FALSE) {
-			ERROR("Huh. Couldn't parse program. There should be additional errors explaining why.\nUsing dumb shader...\n");
-			dumb_shader(fp);
-			fp->inst_offset = 0;
-			fp->inst_end = cs.nrslots - 1;
-			return;
-		}
-		fp->inst_offset = 0;
-		fp->inst_end = cs.nrslots - 1;
+		r300UpdateStateParameters(r300->radeon.glCtx, _NEW_PROGRAM);
 
 		fp->translated = GL_TRUE;
 		if (RADEON_DEBUG & DEBUG_PIXEL) {
@@ -1520,16 +417,12 @@ void r500TranslateFragmentShader(r300ContextPtr r300,
 			fprintf(stderr, "-------------\n");
 			_mesa_print_program(&fp->mesa_program.Base);
 			fflush(stdout);
-			dump_program(fp);
+			dump_program(&fp->code);
 		}
 
-
-		r300UpdateStateParameters(fp->ctx, _NEW_PROGRAM);
-
-		fp->cs = 0;
 	}
 
-	update_params(fp);
+	update_params(r300, fp);
 
 }
 
@@ -1630,7 +523,7 @@ static char *to_texop(int val)
   return NULL;
 }
 
-static void dump_program(struct r500_fragment_program *fp)
+static void dump_program(struct r500_fragment_program_code *code)
 {
 
   fprintf(stderr, "R500 Fragment Program:\n--------\n");
@@ -1640,18 +533,18 @@ static void dump_program(struct r500_fragment_program *fp)
   uint32_t inst0;
   char *str = NULL;
 
-  if (fp->const_nr) {
+  if (code->const_nr) {
     fprintf(stderr, "--------\nConstants:\n");
-    for (n = 0; n < fp->const_nr; n++) {
+    for (n = 0; n < code->const_nr; n++) {
       fprintf(stderr, "Constant %d: %f %f\n\t %f %f\n", n,
-        fp->constant[n][0], fp->constant[n][1], fp->constant[n][2],
-        fp->constant[n][3]);
+        code->constant[n][0], code->constant[n][1], code->constant[n][2],
+        code->constant[n][3]);
     }
     fprintf(stderr, "--------\n");
   }
 
-  for (n = 0; n < fp->inst_end+1; n++) {
-    inst0 = inst = fp->inst[n].inst0;
+  for (n = 0; n < code->inst_end+1; n++) {
+    inst0 = inst = code->inst[n].inst0;
     fprintf(stderr,"%d\t0:CMN_INST   0x%08x:", n, inst);
     switch(inst & 0x3) {
     case R500_INST_TYPE_ALU: str = "ALU"; break;
@@ -1670,8 +563,8 @@ static void dump_program(struct r500_fragment_program *fp)
     switch(inst0 & 0x3) {
     case 0:
     case 1:
-      fprintf(stderr,"\t1:RGB_ADDR   0x%08x:", fp->inst[n].inst1);
-      inst = fp->inst[n].inst1;
+      fprintf(stderr,"\t1:RGB_ADDR   0x%08x:", code->inst[n].inst1);
+      inst = code->inst[n].inst1;
 
       fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
 	      inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
@@ -1679,15 +572,15 @@ static void dump_program(struct r500_fragment_program *fp)
 	      (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
 	      (inst >> 30));
 
-      fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", fp->inst[n].inst2);
-      inst = fp->inst[n].inst2;
+      fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2);
+      inst = code->inst[n].inst2;
       fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
 	      inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
 	      (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
 	      (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
 	      (inst >> 30));
-      fprintf(stderr,"\t3 RGB_INST:  0x%08x:", fp->inst[n].inst3);
-      inst = fp->inst[n].inst3;
+      fprintf(stderr,"\t3 RGB_INST:  0x%08x:", code->inst[n].inst3);
+      inst = code->inst[n].inst3;
       fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d\n",
 	      (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
 	      (inst >> 11) & 0x3,
@@ -1695,16 +588,16 @@ static void dump_program(struct r500_fragment_program *fp)
 	      (inst >> 24) & 0x3);
 
 
-      fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", fp->inst[n].inst4);
-      inst = fp->inst[n].inst4;
+      fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4);
+      inst = code->inst[n].inst4;
       fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d w:%d\n", to_alpha_op(inst & 0xf),
 	      (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
 	      (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
 	      (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
 	      (inst >> 31) & 0x1);
 
-      fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", fp->inst[n].inst5);
-      inst = fp->inst[n].inst5;
+      fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5);
+      inst = code->inst[n].inst5;
       fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
 	      (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
 	      (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
@@ -1714,11 +607,11 @@ static void dump_program(struct r500_fragment_program *fp)
     case 2:
       break;
     case 3:
-      inst = fp->inst[n].inst1;
+      inst = code->inst[n].inst1;
       fprintf(stderr,"\t1:TEX_INST:  0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
 	      to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
 	      (inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
-      inst = fp->inst[n].inst2;
+      inst = code->inst[n].inst2;
       fprintf(stderr,"\t2:TEX_ADDR:  0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
 	      inst & 127, inst & (1<<7) ? "(rel)" : "",
 	      toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
@@ -1727,7 +620,7 @@ static void dump_program(struct r500_fragment_program *fp)
 	      toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
 	      toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
 
-      fprintf(stderr,"\t3:TEX_DXDY:  0x%08x\n", fp->inst[n].inst3);
+      fprintf(stderr,"\t3:TEX_DXDY:  0x%08x\n", code->inst[n].inst3);
       break;
     }
     fprintf(stderr,"\n");
diff --git a/src/mesa/drivers/dri/r300/r500_fragprog.h b/src/mesa/drivers/dri/r300/r500_fragprog.h
index 5dd2def1c4..ff6a9002c1 100644
--- a/src/mesa/drivers/dri/r300/r500_fragprog.h
+++ b/src/mesa/drivers/dri/r300/r500_fragprog.h
@@ -36,10 +36,14 @@
 #include "glheader.h"
 #include "macros.h"
 #include "enums.h"
+#include "shader/prog_parameter.h"
+#include "shader/prog_print.h"
 #include "shader/program.h"
 #include "shader/prog_instruction.h"
 
 #include "r300_context.h"
+#include "r300_state.h"
+#include "radeon_program.h"
 
 /* supported hw opcodes */
 #define PFS_OP_MAD 0
@@ -76,4 +80,13 @@ struct r500_fragment_program;
 extern void r500TranslateFragmentShader(r300ContextPtr r300,
 					struct r500_fragment_program *fp);
 
+struct r500_fragment_program_compiler {
+	r300ContextPtr r300;
+	struct r500_fragment_program *fp;
+	struct r500_fragment_program_code *code;
+	struct radeon_compiler compiler;
+};
+
+extern GLboolean r500FragmentProgramEmit(struct r500_fragment_program_compiler *compiler);
+
 #endif