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Diffstat (limited to 'src/gallium/drivers/cell/spu')
-rw-r--r--src/gallium/drivers/cell/spu/spu_main.c9
-rw-r--r--src/gallium/drivers/cell/spu/spu_vertex_fetch.c6
-rw-r--r--src/gallium/drivers/cell/spu/spu_vertex_shader.c68
-rw-r--r--src/gallium/drivers/cell/spu/spu_vertex_shader.h5
4 files changed, 47 insertions, 41 deletions
diff --git a/src/gallium/drivers/cell/spu/spu_main.c b/src/gallium/drivers/cell/spu/spu_main.c
index fcbf0f841e..dbc3705c24 100644
--- a/src/gallium/drivers/cell/spu/spu_main.c
+++ b/src/gallium/drivers/cell/spu/spu_main.c
@@ -433,10 +433,19 @@ cmd_batch(uint opcode)
sizeof(struct pipe_viewport_state));
pos += (1 + ROUNDUP8(sizeof(struct pipe_viewport_state)) / 8);
break;
+ case CELL_CMD_STATE_UNIFORMS:
+ draw.constants = (float (*)[4]) (uintptr_t) buffer[pos + 1];
+ pos += 2;
+ break;
case CELL_CMD_STATE_VS_ARRAY_INFO:
cmd_state_vs_array_info((struct cell_array_info *) &buffer[pos+1]);
pos += (1 + ROUNDUP8(sizeof(struct cell_array_info)) / 8);
break;
+ case CELL_CMD_STATE_BIND_VS:
+ spu_bind_vertex_shader(&draw,
+ (struct cell_shader_info *) &buffer[pos+1]);
+ pos += (1 + ROUNDUP8(sizeof(struct cell_shader_info)) / 8);
+ break;
case CELL_CMD_STATE_ATTRIB_FETCH: {
struct cell_attribute_fetch_code *code =
(struct cell_attribute_fetch_code *) &buffer[pos+1];
diff --git a/src/gallium/drivers/cell/spu/spu_vertex_fetch.c b/src/gallium/drivers/cell/spu/spu_vertex_fetch.c
index 55c6c28717..e5d9910ff3 100644
--- a/src/gallium/drivers/cell/spu/spu_vertex_fetch.c
+++ b/src/gallium/drivers/cell/spu/spu_vertex_fetch.c
@@ -64,7 +64,7 @@ typedef void (*spu_fetch_func)(qword *out, const qword *in,
const qword *shuffle_data);
-static const qword fetch_shuffle_data[] = {
+static const qword fetch_shuffle_data[5] ALIGN16_ATTRIB = {
/* Shuffle used by CVT_64_FLOAT
*/
{
@@ -108,7 +108,7 @@ static const qword fetch_shuffle_data[] = {
static INLINE void
fetch_unaligned(qword *dst, unsigned ea, unsigned size)
{
- qword tmp[4];
+ qword tmp[4] ALIGN16_ATTRIB;
const int shift = ea & 0x0f;
const unsigned aligned_start_ea = ea & ~0x0f;
const unsigned aligned_end_ea = (ea + size) & ~0x0f;
@@ -169,7 +169,7 @@ static void generic_vertex_fetch(struct spu_vs_context *draw,
unsigned idx;
const unsigned bytes_per_entry = draw->vertex_fetch.size[attr];
const unsigned quads_per_entry = (bytes_per_entry + 15) / 16;
- qword in[2 * 4];
+ qword in[2 * 4] ALIGN16_ATTRIB;
/* Fetch four attributes for four vertices.
diff --git a/src/gallium/drivers/cell/spu/spu_vertex_shader.c b/src/gallium/drivers/cell/spu/spu_vertex_shader.c
index 3f5bf41aa2..8363efeeb6 100644
--- a/src/gallium/drivers/cell/spu/spu_vertex_shader.c
+++ b/src/gallium/drivers/cell/spu/spu_vertex_shader.c
@@ -165,63 +165,55 @@ run_vertex_program(struct spu_vs_context *draw,
}
-static void
-spu_bind_vertex_shader(struct spu_vs_context *draw,
- void *uniforms,
- void *planes,
- unsigned nr_planes,
- unsigned num_outputs
- )
-{
- draw->constants = (float (*)[4]) uniforms;
-
- (void) memcpy(draw->plane, planes, sizeof(float) * 4 * nr_planes);
- draw->nr_planes = nr_planes;
- draw->num_vs_outputs = num_outputs;
-
- /* specify the shader to interpret/execute */
- spu_exec_machine_init(&draw->machine,
- PIPE_MAX_SAMPLERS,
- NULL /*samplers*/,
- PIPE_SHADER_VERTEX);
-}
-
-
unsigned char immediates[(sizeof(float) * 4 * TGSI_EXEC_NUM_IMMEDIATES) + 32]
ALIGN16_ATTRIB;
+
void
-spu_execute_vertex_shader(struct spu_vs_context *draw,
- const struct cell_command_vs *vs)
+spu_bind_vertex_shader(struct spu_vs_context *draw,
+ struct cell_shader_info *vs)
{
- unsigned i;
-
- const uint64_t immediate_addr = vs->shader.immediates;
+ const unsigned immediate_addr = vs->immediates;
const unsigned immediate_size =
- ROUNDUP16((sizeof(float) * 4 * vs->shader.num_immediates)
- + (immediate_addr & 0x0f));
+ ROUNDUP16((sizeof(float) * 4 * vs->num_immediates)
+ + (immediate_addr & 0x0f));
+
mfc_get(immediates, immediate_addr & ~0x0f, immediate_size,
TAG_VERTEX_BUFFER, 0, 0);
draw->machine.Instructions = (struct tgsi_full_instruction *)
- vs->shader.instructions;
- draw->machine.NumInstructions = vs->shader.num_instructions;
+ vs->instructions;
+ draw->machine.NumInstructions = vs->num_instructions;
draw->machine.Declarations = (struct tgsi_full_declaration *)
- vs->shader.declarations;
- draw->machine.NumDeclarations = vs->shader.num_declarations;
+ vs->declarations;
+ draw->machine.NumDeclarations = vs->num_declarations;
- draw->vertex_fetch.nr_attrs = vs->nr_attrs;
+ draw->num_vs_outputs = vs->num_outputs;
+
+ /* specify the shader to interpret/execute */
+ spu_exec_machine_init(&draw->machine,
+ PIPE_MAX_SAMPLERS,
+ NULL /*samplers*/,
+ PIPE_SHADER_VERTEX);
wait_on_mask(1 << TAG_VERTEX_BUFFER);
(void) memcpy(& draw->machine.Imms, &immediates[immediate_addr & 0x0f],
- sizeof(float) * 4 * vs->shader.num_immediates);
+ sizeof(float) * 4 * vs->num_immediates);
+}
- spu_bind_vertex_shader(draw, vs->shader.uniforms,
- vs->plane, vs->nr_planes,
- vs->shader.num_outputs);
+
+void
+spu_execute_vertex_shader(struct spu_vs_context *draw,
+ const struct cell_command_vs *vs)
+{
+ unsigned i;
+
+ (void) memcpy(draw->plane, vs->plane, sizeof(float) * 4 * vs->nr_planes);
+ draw->nr_planes = vs->nr_planes;
+ draw->vertex_fetch.nr_attrs = vs->nr_attrs;
for (i = 0; i < vs->num_elts; i += 4) {
const unsigned batch_size = MIN2(vs->num_elts - i, 4);
diff --git a/src/gallium/drivers/cell/spu/spu_vertex_shader.h b/src/gallium/drivers/cell/spu/spu_vertex_shader.h
index 0fb0bc28d0..54a4b8d9b9 100644
--- a/src/gallium/drivers/cell/spu/spu_vertex_shader.h
+++ b/src/gallium/drivers/cell/spu/spu_vertex_shader.h
@@ -1,6 +1,7 @@
#ifndef SPU_VERTEX_SHADER_H
#define SPU_VERTEX_SHADER_H
+#include "cell/common.h"
#include "pipe/p_format.h"
#include "spu_exec.h"
@@ -55,6 +56,10 @@ static INLINE void spu_vertex_fetch(struct spu_vs_context *draw,
struct cell_command_vs;
extern void
+spu_bind_vertex_shader(struct spu_vs_context *draw,
+ struct cell_shader_info *vs);
+
+extern void
spu_execute_vertex_shader(struct spu_vs_context *draw,
const struct cell_command_vs *vs);