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-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common.c35
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common.h1
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common_context.c57
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common_context.h6
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_context.h4
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_dma.c1
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_fbo.c6
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c26
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_state.c25
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_texstate.c15
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_texture.c11
11 files changed, 94 insertions, 93 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index 3b4366aa61..51fa618937 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -257,36 +257,11 @@ void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h)
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
if (ctx->Scissor.Enabled) {
/* We don't pipeline cliprect changes */
- if (!radeon->radeonScreen->kernel_mm) {
- radeon_firevertices(radeon);
- }
+ radeon_firevertices(radeon);
radeonUpdateScissor(ctx);
}
}
-void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask )
-{
- radeonContextPtr radeon = RADEON_CONTEXT(ctx);
- GLuint i;
- drm_radeon_stipple_t stipple;
-
- /* Must flip pattern upside down.
- */
- for ( i = 0 ; i < 32 ; i++ ) {
- stipple.mask[31 - i] = ((GLuint *) mask)[i];
- }
-
- /* TODO: push this into cmd mechanism
- */
- radeon_firevertices(radeon);
- LOCK_HARDWARE( radeon );
-
- drmCommandWrite( radeon->dri.fd, DRM_RADEON_STIPPLE,
- &stipple, sizeof(stipple) );
- UNLOCK_HARDWARE( radeon );
-}
-
-
/* ================================================================
* SwapBuffers with client-side throttling
*/
@@ -842,7 +817,7 @@ void radeonDrawBuffer( GLcontext *ctx, GLenum mode )
*/
if (!was_front_buffer_rendering && radeon->is_front_buffer_rendering) {
radeon_update_renderbuffers(radeon->dri.context,
- radeon->dri.context->driDrawablePriv);
+ radeon->dri.context->driDrawablePriv, GL_FALSE);
}
}
@@ -859,7 +834,7 @@ void radeonReadBuffer( GLcontext *ctx, GLenum mode )
if (!was_front_buffer_reading && rmesa->is_front_buffer_reading) {
radeon_update_renderbuffers(rmesa->dri.context,
- rmesa->dri.context->driReadablePriv);
+ rmesa->dri.context->driReadablePriv, GL_FALSE);
}
}
/* nothing, until we implement h/w glRead/CopyPixels or CopyTexImage */
@@ -910,9 +885,9 @@ void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei he
if (radeon->is_front_buffer_rendering) {
ctx->Driver.Flush(ctx);
}
- radeon_update_renderbuffers(driContext, driContext->driDrawablePriv);
+ radeon_update_renderbuffers(driContext, driContext->driDrawablePriv, GL_FALSE);
if (driContext->driDrawablePriv != driContext->driReadablePriv)
- radeon_update_renderbuffers(driContext, driContext->driReadablePriv);
+ radeon_update_renderbuffers(driContext, driContext->driReadablePriv, GL_FALSE);
}
old_viewport = ctx->Driver.Viewport;
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h
index def0cc17a9..0608fe2418 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common.h
@@ -10,7 +10,6 @@ void radeonRecalcScissorRects(radeonContextPtr radeon);
void radeonSetCliprects(radeonContextPtr radeon);
void radeonUpdateScissor( GLcontext *ctx );
void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h);
-void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask );
void radeonWaitForIdleLocked(radeonContextPtr radeon);
extern uint32_t radeonGetAge(radeonContextPtr radeon);
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index 71f70d724b..5c68bf5df6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -499,7 +499,8 @@ radeon_bits_per_pixel(const struct radeon_renderbuffer *rb)
}
void
-radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
+radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable,
+ GLboolean front_only)
{
unsigned int attachments[10];
__DRIbuffer *buffers = NULL;
@@ -525,7 +526,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
struct radeon_renderbuffer *stencil_rb;
i = 0;
- if ((radeon->is_front_buffer_rendering ||
+ if ((front_only || radeon->is_front_buffer_rendering ||
radeon->is_front_buffer_reading ||
!draw->color_rb[1])
&& draw->color_rb[0]) {
@@ -533,23 +534,25 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
attachments[i++] = radeon_bits_per_pixel(draw->color_rb[0]);
}
- if (draw->color_rb[1]) {
- attachments[i++] = __DRI_BUFFER_BACK_LEFT;
- attachments[i++] = radeon_bits_per_pixel(draw->color_rb[1]);
- }
+ if (!front_only) {
+ if (draw->color_rb[1]) {
+ attachments[i++] = __DRI_BUFFER_BACK_LEFT;
+ attachments[i++] = radeon_bits_per_pixel(draw->color_rb[1]);
+ }
- depth_rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH);
- stencil_rb = radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL);
-
- if ((depth_rb != NULL) && (stencil_rb != NULL)) {
- attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
- attachments[i++] = radeon_bits_per_pixel(depth_rb);
- } else if (depth_rb != NULL) {
- attachments[i++] = __DRI_BUFFER_DEPTH;
- attachments[i++] = radeon_bits_per_pixel(depth_rb);
- } else if (stencil_rb != NULL) {
- attachments[i++] = __DRI_BUFFER_STENCIL;
- attachments[i++] = radeon_bits_per_pixel(stencil_rb);
+ depth_rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH);
+ stencil_rb = radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL);
+
+ if ((depth_rb != NULL) && (stencil_rb != NULL)) {
+ attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
+ attachments[i++] = radeon_bits_per_pixel(depth_rb);
+ } else if (depth_rb != NULL) {
+ attachments[i++] = __DRI_BUFFER_DEPTH;
+ attachments[i++] = radeon_bits_per_pixel(depth_rb);
+ } else if (stencil_rb != NULL) {
+ attachments[i++] = __DRI_BUFFER_STENCIL;
+ attachments[i++] = radeon_bits_per_pixel(stencil_rb);
+ }
}
buffers = (*screen->dri2.loader->getBuffersWithFormat)(drawable,
@@ -562,12 +565,14 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
i = 0;
if (draw->color_rb[0])
attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
- if (draw->color_rb[1])
- attachments[i++] = __DRI_BUFFER_BACK_LEFT;
- if (radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH))
- attachments[i++] = __DRI_BUFFER_DEPTH;
- if (radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL))
- attachments[i++] = __DRI_BUFFER_STENCIL;
+ if (!front_only) {
+ if (draw->color_rb[1])
+ attachments[i++] = __DRI_BUFFER_BACK_LEFT;
+ if (radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH))
+ attachments[i++] = __DRI_BUFFER_DEPTH;
+ if (radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL))
+ attachments[i++] = __DRI_BUFFER_STENCIL;
+ }
buffers = (*screen->dri2.loader->getBuffers)(drawable,
&drawable->w,
@@ -735,9 +740,9 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
readfb = driReadPriv->driverPrivate;
if (driContextPriv->driScreenPriv->dri2.enabled) {
- radeon_update_renderbuffers(driContextPriv, driDrawPriv);
+ radeon_update_renderbuffers(driContextPriv, driDrawPriv, GL_FALSE);
if (driDrawPriv != driReadPriv)
- radeon_update_renderbuffers(driContextPriv, driReadPriv);
+ radeon_update_renderbuffers(driContextPriv, driReadPriv, GL_FALSE);
_mesa_reference_renderbuffer(&radeon->state.color.rb,
&(radeon_get_renderbuffer(&drfb->base, BUFFER_BACK_LEFT)->base));
_mesa_reference_renderbuffer(&radeon->state.depth.rb,
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index ad953ddbb5..0739496e03 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -406,9 +406,6 @@ struct radeon_state {
struct radeon_depthbuffer_state depth;
struct radeon_scissor_state scissor;
struct radeon_stencilbuffer_state stencil;
-
- struct radeon_cs_space_check bos[RADEON_MAX_BOS];
- int validated_bo_count;
};
/**
@@ -589,7 +586,8 @@ GLboolean radeonInitContext(radeonContextPtr radeon,
void radeonCleanupContext(radeonContextPtr radeon);
GLboolean radeonUnbindContext(__DRIcontextPrivate * driContextPriv);
-void radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable);
+void radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable,
+ GLboolean front_only);
GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
__DRIdrawablePrivate * driDrawPriv,
__DRIdrawablePrivate * driReadPriv);
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h
index 4e2c52c835..12ab33a009 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_context.h
@@ -331,8 +331,12 @@ struct r100_hw_state {
struct radeon_state_atom stp;
};
+struct radeon_stipple_state {
+ GLuint mask[32];
+};
struct r100_state {
+ struct radeon_stipple_state stipple;
struct radeon_texture_state texture;
};
diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c
index b8c65f4ce6..d31e4e47dd 100644
--- a/src/mesa/drivers/dri/radeon/radeon_dma.c
+++ b/src/mesa/drivers/dri/radeon/radeon_dma.c
@@ -205,7 +205,6 @@ again_alloc:
counter on unused buffers for later freeing them from
begin of list */
dma_bo = last_elem(&rmesa->dma.free);
- assert(dma_bo->bo->cref == 1);
remove_from_list(dma_bo);
insert_at_head(&rmesa->dma.reserved, dma_bo);
}
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 7ec641ff18..fc21069a92 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -369,6 +369,12 @@ radeon_framebuffer_renderbuffer(GLcontext * ctx,
}
+/* TODO: According to EXT_fbo spec internal format of texture image
+ * once set during glTexImage call, should be preserved when
+ * attaching image to renderbuffer. When HW doesn't support
+ * rendering to format of attached image, set framebuffer
+ * completeness accordingly in radeon_validate_framebuffer (issue #79).
+ */
static GLboolean
radeon_update_wrapper(GLcontext *ctx, struct radeon_renderbuffer *rrb,
struct gl_texture_image *texImage)
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index bdbb9460bf..a7f347202a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -437,9 +437,12 @@ static void migrate_image_to_miptree(radeon_mipmap_tree *mt,
radeon_mipmap_level *srclvl = &image->mt->levels[image->mtlevel];
+ /* TODO: bring back these assertions once the FBOs are fixed */
+#if 0
assert(image->mtlevel == level);
assert(srclvl->size == dstlvl->size);
assert(srclvl->rowstride == dstlvl->rowstride);
+#endif
radeon_bo_map(image->mt->bo, GL_FALSE);
@@ -450,23 +453,18 @@ static void migrate_image_to_miptree(radeon_mipmap_tree *mt,
radeon_miptree_unreference(&image->mt);
} else {
- /* need to confirm this value is correct */
- if (_mesa_is_format_compressed(image->base.TexFormat)) {
- unsigned size = _mesa_format_image_size(image->base.TexFormat,
- image->base.Width,
- image->base.Height,
- image->base.Depth);
- memcpy(dest, image->base.Data, size);
- } else {
- uint32_t srcrowstride;
- uint32_t height;
+ const uint32_t srcrowstride = _mesa_format_row_stride(image->base.TexFormat, image->base.Width);
+ uint32_t rows = image->base.Height * image->base.Depth;
- height = image->base.Height * image->base.Depth;
- srcrowstride = image->base.Width * _mesa_get_format_bytes(image->base.TexFormat);
- copy_rows(dest, dstlvl->rowstride, image->base.Data, srcrowstride,
- height, srcrowstride);
+ if (_mesa_is_format_compressed(image->base.TexFormat)) {
+ uint32_t blockWidth, blockHeight;
+ _mesa_get_format_block_size(image->base.TexFormat, &blockWidth, &blockHeight);
+ rows = (rows + blockHeight - 1) / blockHeight;
}
+ copy_rows(dest, dstlvl->rowstride, image->base.Data, srcrowstride,
+ rows, srcrowstride);
+
_mesa_free_texmemory(image->base.Data);
image->base.Data = 0;
}
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index 4d0d35ee0c..f6c733ab20 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -550,6 +550,31 @@ static void radeonPolygonOffset( GLcontext *ctx,
rmesa->hw.zbs.cmd[ZBS_SE_ZBIAS_CONSTANT] = constant.ui32;
}
+static void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask )
+{
+ r100ContextPtr rmesa = R100_CONTEXT(ctx);
+ GLuint i;
+ drm_radeon_stipple_t stipple;
+
+ /* Must flip pattern upside down.
+ */
+ for ( i = 0 ; i < 32 ; i++ ) {
+ rmesa->state.stipple.mask[31 - i] = ((GLuint *) mask)[i];
+ }
+
+ /* TODO: push this into cmd mechanism
+ */
+ radeon_firevertices(&rmesa->radeon);
+ LOCK_HARDWARE( &rmesa->radeon );
+
+ /* FIXME: Use window x,y offsets into stipple RAM.
+ */
+ stipple.mask = rmesa->state.stipple.mask;
+ drmCommandWrite( rmesa->radeon.dri.fd, DRM_RADEON_STIPPLE,
+ &stipple, sizeof(drm_radeon_stipple_t) );
+ UNLOCK_HARDWARE( &rmesa->radeon );
+}
+
static void radeonPolygonMode( GLcontext *ctx, GLenum face, GLenum mode )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index 3cbe3b4725..84ddcfd4fd 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -672,24 +672,13 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_
return;
}
- radeon_update_renderbuffers(pDRICtx, dPriv);
- /* back & depth buffer are useless free them right away */
- rb = (void*)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer;
- if (rb && rb->bo) {
- radeon_bo_unref(rb->bo);
- rb->bo = NULL;
- }
- rb = (void*)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer;
- if (rb && rb->bo) {
- radeon_bo_unref(rb->bo);
- rb->bo = NULL;
- }
+ radeon_update_renderbuffers(pDRICtx, dPriv, GL_TRUE);
rb = rfb->color_rb[0];
if (rb->bo == NULL) {
/* Failed to BO for the buffer */
return;
}
-
+
_mesa_lock_texture(radeon->glCtx, texObj);
if (t->bo) {
radeon_bo_unref(t->bo);
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 0390d376ba..28690325d1 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -515,15 +515,18 @@ static int image_matches_texture_obj(struct gl_texture_object *texObj,
struct gl_texture_image *texImage,
unsigned level)
{
- const struct gl_texture_image *baseImage = texObj->Image[0][level];
+ const struct gl_texture_image *baseImage = texObj->Image[0][texObj->BaseLevel];
+
+ if (!baseImage)
+ return 0;
if (level < texObj->BaseLevel || level > texObj->MaxLevel)
return 0;
const unsigned levelDiff = level - texObj->BaseLevel;
- const unsigned refWidth = baseImage->Width >> levelDiff;
- const unsigned refHeight = baseImage->Height >> levelDiff;
- const unsigned refDepth = baseImage->Depth >> levelDiff;
+ const unsigned refWidth = MAX2(baseImage->Width >> levelDiff, 1);
+ const unsigned refHeight = MAX2(baseImage->Height >> levelDiff, 1);
+ const unsigned refDepth = MAX2(baseImage->Depth >> levelDiff, 1);
return (texImage->Width == refWidth &&
texImage->Height == refHeight &&
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-19 11:02:15 +0000