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path: root/src/mesa/drivers/dri/i965/brw_gs_state.c
AgeCommit message (Expand)Author
2010-01-25Merge branch 'mesa_7_7_branch'Brian Paul
2010-01-22i965: Remove unnecessary headers.Vinson Lee
2010-01-19i965: Allow for variable-sized auxdata in the state cache.Eric Anholt
2009-12-22intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.Eric Anholt
2009-09-04i965: Add support for 2 threads in the GS.Eric Anholt
2009-07-13i965: add support for new chipsetsXiang, Haihao
2008-09-18mesa: added "main/" prefix to includes, remove some -I paths from Makefile.te...Brian Paul
2008-09-10intel: track bufmgr move to libdrm_intel and bufmgr_fake irq emit/wait change.Eric Anholt
2008-08-24Revert "Revert "Merge branch 'drm-gem'""Dave Airlie
2008-08-24Revert "Merge branch 'drm-gem'"Dave Airlie
2008-08-08intel-gem: Update to new check_aperture API for classic mode.Eric Anholt
2008-06-11[intel-gem] Chase domain flag renaming in the DRM.Eric Anholt
2008-06-03[intel] Convert drivers to using libdrm bufmgr code.Eric Anholt
2008-05-07GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags.Eric Anholt
2008-04-18i965: initial attempt at fixing the aperture overflowDave Airlie
2008-01-03[intel] Convert relocations to not be cleared out on buffer submit.Eric Anholt
2008-01-02[965] Convert GS unit to use a cache key instead of brw_cache_data.Eric Anholt
2007-12-14[965] Replace the state cache suballocator with direct dri_bufmgr use.Eric Anholt
2007-10-04[965] Replace various alignment code with a shared ALIGN() macro.Eric Anholt
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt