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path: root/src/mesa/drivers/dri/i965/brw_wm_emit.c
AgeCommit message (Expand)Author
2009-12-28intel: Silence compiler warnings.Vinson Lee
2009-11-13i965: Share OPCODE_TXB between brw_wm_emit.c and brw_wm_glsl.cEric Anholt
2009-11-13i965: Share OPCODE_TEX between brw_wm_emit.c and brw_wm_glsl.c.Eric Anholt
2009-11-13i965: Clean up emit_tex a bit.Eric Anholt
2009-11-13Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt
2009-11-13i965: Clean up Ironlake sampler type definitions.Eric Anholt
2009-11-12i965: Fix Ironlake shadow comparisons.Eric Anholt
2009-11-06i965: Use Compr4 instruction compression mode on G4X and newer.Eric Anholt
2009-11-06i965: Share min/max between brw_wm_emit.c and brw_wm_glsl.cEric Anholt
2009-11-06i965: Share emit_fb_write() between brw_wm_emit.c and brw_wm_glsl.cEric Anholt
2009-11-06i965: Share most of the WM functions between brw_wm_glsl.c and brw_wm_emit.cEric Anholt
2009-11-06i965: Share math functions between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt
2009-11-06i965: Share the sop opcodes between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt
2009-11-06i965: Share OPCODE_MAD between brw_wm_glsl.c and brw_wm_emit.cEric Anholt
2009-11-06i965: Share the DP3, DP4, and DPH between brw_wm_glsl.c and brw_wm_emit.cEric Anholt
2009-11-06i965: Add generic GLSL code for unaliasing a 3-arg opcode, and share LRP code.Eric Anholt
2009-11-06i965: Use a normal alu1 emit for OPCODE_TRUNC.Eric Anholt
2009-11-06i965: Share basic ALU ops between brw_wm_glsl and brw_wm_emit.cEric Anholt
2009-09-11i965: Move OPCODE_DDX/DDY to brw_wm_emit.c and make it actually work.Eric Anholt
2009-09-04i965: Add support for KIL_NV in brw_wm_emit.cEric Anholt
2009-08-26i965: clean up texture target switchesBrian Paul
2009-08-22i965: Implement frag prog DPH like DP4Ian Romanick
2009-08-12i965: Handle scalar result swizzling in shared GLSL/non-GLSL code.Eric Anholt
2009-08-12i965: Remove some unused WM opcode args.Eric Anholt
2009-08-04i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.Eric Anholt
2009-07-13i965: add support for new chipsetsXiang, Haihao
2009-07-02i965: fixes for JMPIXiang, Haihao
2009-06-26i965: fix fetching constants from constant buffer in glsl pathRoland Scheidegger
2009-06-02i965: Support OPCODE_TRUNC in the brw_wm_fp.c code.Eric Anholt
2009-04-09i965: new SURF_INDEX_ macrosBrian Paul
2009-04-03i965: comments, whitespace changesBrian Paul
2009-03-23i965: Fix glFrontFacing in twoside GLSL demo.Eric Anholt
2009-03-12i965: commentsBrian Paul
2009-02-20i965: use the new prog_instruction::TexShadow fieldBrian Paul
2009-01-01i965: indentation and formatting fixesBrian Paul
2008-09-25i965: more meaningful message for unsupported opcodes.Sam Hocevar
2008-09-18mesa: added "main/" prefix to includes, remove some -I paths from Makefile.te...Brian Paul
2008-07-23965: Fix partially transparent textures in Doom 3 engine gamesPawel Pieczul
2008-06-21replace __inline and __inline__ with INLINE macroBrian Paul
2008-04-22i965: fix DEPTH_TEXTURE_MODE (bug #14220)Xiang, Haihao
2008-03-21[965] Avoid emitting dead code for DPx/math instructions.Michal Wajdeczko
2008-03-21[965] Improve pinterp performance by delaying reads of just-written regs.Michal Wajdeczko
2008-03-21[965] Fix negating of unsigned value in emit_wpos_xy.Michal Wajdeczko
2008-03-17 [i965] fix wpos height 1 pixel higherZou Nan hai
2008-03-13 [i965] multiple rendering target supportZou Nan hai
2008-02-28[965] Bug #9151: make fragment.position return window coords not screen coords.Eric Anholt
2007-11-30i965: use uncompressed instruction to ensure onlyXiang, Haihao
2007-10-09 shadow sampler fix.Zou Nan hai
2007-06-21 support branch and loop in pixel shaderZou Nan hai
2007-04-12 Initial 965 GLSL supportZou Nan hai
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