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authorAndre Maasikas <amaasikas@gmail.com>2009-12-08 11:57:24 +0200
committerAndre Maasikas <amaasikas@gmail.com>2009-12-08 11:57:24 +0200
commitb5e256c76dea2182c82af2a4f66224735701d55a (patch)
tree42ab2283fc94ab3deefc30983aaa10f283897dd6 /src/mesa/drivers/dri/r600/r700_assembler.c
parentac66598ed8bc218720cf2a1a7493b7e25ca9d962 (diff)
parent0d4a05445c6b47b93269a3829afbe509ffec4817 (diff)
Merge branch 'mesa_7_7_branch'
Conflicts: src/mesa/drivers/dri/r600/r700_assembler.c src/mesa/main/version.h
Diffstat (limited to 'src/mesa/drivers/dri/r600/r700_assembler.c')
-rw-r--r--src/mesa/drivers/dri/r600/r700_assembler.c29
1 files changed, 12 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c
index 309c90fdd0..cf64d170ed 100644
--- a/src/mesa/drivers/dri/r600/r700_assembler.c
+++ b/src/mesa/drivers/dri/r600/r700_assembler.c
@@ -4626,22 +4626,6 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
need_barrier = GL_TRUE;
}
- switch (pAsm->pILInst[pAsm->uiCurInst].Opcode)
- {
- case OPCODE_TEX:
- break;
- case OPCODE_TXB:
- radeon_error("do not support TXB yet\n");
- return GL_FALSE;
- break;
- case OPCODE_TXP:
- break;
- default:
- radeon_error("Internal error: bad texture op (not TEX)\n");
- return GL_FALSE;
- break;
- }
-
if (pAsm->pILInst[pAsm->uiCurInst].Opcode == OPCODE_TXP)
{
GLuint tmp = gethelpr(pAsm);
@@ -4820,7 +4804,18 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
}
- pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE;
+ if(pAsm->pILInst[pAsm->uiCurInst].Opcode == OPCODE_TXB)
+ {
+ pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE_L;
+ }
+ else
+ {
+ pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE;
+ }
+
+ pAsm->is_tex = GL_TRUE;
+ if ( GL_TRUE == need_barrier )
+
pAsm->is_tex = GL_TRUE;
if ( GL_TRUE == need_barrier )
{